pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 267

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
Table 10: PCI Configuration Registers
PNX17XX_SER_1
Preliminary data sheet
Bit
Offset 0x0000
31:16
15:0
Offset 0x0004
31
30
29
28
27
26:25
24
23
22
21
20
19:10
9
8
7
6
5
4
3
2
1
0
Offset 0x0008
31:8
Symbol
Device ID
Vendor ID
Parity Error
Signaled System Error
Received Master Abort
Received Target Abort
Signaled Target Abort
Devsel Timing
Master Data Parity Error R/W
Fast Back-to-Back
Capable
Reserved
66 MHz Capable
Capabilities List
Reserved
Fast back-to-back
enable
SERR enable
Stepping Control
Parity Error Response
VGA Palette Snoop
Memory Write &
Invalidate
Special Cycles
Enable Bus Master
Enable Memory space
IO Space
Class Code
Device ID/Vendor ID
Command/Status
Class Code/Revision ID
Acces
s
R
R
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R/W
R/W
R
R/W
R
R/W
R
R/W
R/W
R
R/W*
Value
0x5406
0x1131
0
0
0
0
0
01
0
1
0
cfg*
1
0000
0
0
0
0
0
0
0
0
0
0
048000
Rev. 1 — 17 March 2006
Description
The ID assigned by the PCI SIG representative. The value will be
hard coded.
Value 0x1131 is the ID assigned to Philips Semiconductors by the
PCI SIG representative.
This bit will be set whenever the device detects a parity error. Write
1 to clear.
This bit is set whenever the device asserts SERR. Write 1 to clear.
Set by the PCI master when its transaction is terminated with a
master abort. Write 1 to clear.
Set by the PCI master when its transaction is terminated with a
target abort. Write 1 to clear.
Set by the PCI target when it terminates a transaction with a target
abort. Write 1 to clear.
The PCI target uses medium DEVSEL timing.
Set by the PCI master when PERR is observed.
The PCI supports fast back-to-back transactions.
0 = 33 MHz PCI (The PNX17xx Series is 33 MHz).
*Value determined by pci_setup register.
Indicates a new Capabilities linked list is available at offset 40h.
Enable fast back-to-back transactions for PCI master.
Enable SERR to report system errors.
Address stepping is not supported.
0 = No parity error response
1 = Enable parity error response.
VGA is not supported.
Enable use of memory write and invalidate.
Special cycles are not supported.
Enable the PCI bus master.
Enable all memory apertures.
The PCI module does not respond to IO transactions.
The PNX17xx Series is defined as a multimedia device.
*The boot loader may change the class code to an alternate value if
done before writing to the pci_setup register.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Chapter 7: PCI-XIO Module
PNX17xx Series
7-46