pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 77
pnx1700
Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1700.pdf
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
10.3 DDR SDRAM interface
All the key components (the analog bypass capacitor and crystal capacitors) are on
the PCB connected to the free-floating analog VSSA_1.2 net
Designing a proper DDR SDRAM interface with the PNX1700 system that
guarantees correct signal integrity and timing margins (even at 200 MHz, i.e.
DDR400) can be achieved by implementing the following board level design rules:
Figure 28: Digital VDD Power Supply to Analog VDDA/VSSA_1.2 Power Supply Filter
Figure 29: Digital VDD Power Supply to Analog VDDA/VSSA_1.2 Power Supply Filter
•
•
•
50
must be adjusted to meet the 50
drivers must be fine tuned to limit undershoot and/or overshoot over traces with
50
‘T’ shape connection when a signal must be connected to two (or more) memory
devices. The bar of the ‘T’ should have impedance higher than 50
compensate for the trace split. 70
the ‘T’ is less than half of the ‘leg’ of the ‘T’.
Each DQS/DQM/DATA byte lane should remain on the same plane and go
through the same amount of VIAs.
trace impedance. The width of the PCB trace as well as the dielectric layer
impedance. This should guarantee high quality signal integrity.
V
V
DD
DD
Rev. 1 — 17 March 2006
100
100
27 MHz
V
DD
47 F
47 F
impedance traces. The PNX1700 SSTL_2
is recommended but not required if the bar of
0.1 F
0.1 F
N.C.
27 MHz
Chapter 1: Integrated Circuit Data
VDDA
XTAL_IN
XTAL_OUT
VSSA_1.2
VDDA
VSSA_1.2
XTAL_IN
XTAL_OUT
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX1700
PNX1700
PNX17xx Series
(Figure
28,
in order to
Figure
29).
1-50
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