pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 708
pnx1700
Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1700.pdf
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
5.2.3 Sequential Order with Wrap-around
5.2.4 Full and Empty State of FIFOs
Software must pre-allocate the arrays used to implement the FIFOs.
Software can hand over ownership of descriptor structures and status structures to
the hardware by incrementing the TxProduceIndex, TxRtProduceIndex, and
RxConsumeIndex registers, wrapping around to 0 if the array boundary is crossed.
Hardware hands over descriptor structures and status structures to hardware by
updating the TxConsumeIndex, TxRtConsumeIndex, and RxProduceIndex registers.
After handing over a descriptor to the receive and transmit DMA hardware, device
driver software should not modify the descriptor or reclaim the descriptor by
decrementing the TxProduceIndex, TxRtProduceIndex, and RxConsumeIndex
registers, because descriptors may have been prefetched by the hardware. In this
case the device driver software will have to wait until the packet has been transmitted.
Or, the device driver can perform soft-reset of the transmit and/or Receive Datapaths,
which will also reset the descriptor FIFOs.
Descriptors are read from the arrays, and statuses are written to the arrays, in
sequential order with wrap-around. Sequential order means that when the Ethernet
module has finished reading or writing a descriptor or status, the next descriptor or
status it reads or writes is the one at the next higher, adjacent memory address.
Wrap-around means that when the Ethernet module has finished reading or writing
the last descriptor or status of the array (with the highest memory address), the next
descriptor or status it reads or writes is the first descriptor or status of the array at the
base address of the array.
The descriptor FIFOs can be empty , partially full or full . A FIFO is empty when all
descriptors are owned by the producer. A FIFO is partially full if both producer and
consumer own part of the descriptors and both are busy processing those
descriptors. A FIFO is full when all descriptors (except one) are owned by the
consumer, so that the producer has no more room to process packets.
Ownership of descriptors is indicated with the use of a consume index and a produce
index . The produce index is the first element of the array owned by the producer. It is
also the index of the array element that is next going to be used by the producer of
packets (which may already be busy using it and subsequent elements). The
consume index is the first element of the array that is owned by the consumer. It is
also the number of the array element next to be consumed by the software (which
may already be busy consuming it and subsequent elements).
If the consume index and the produce index are equal, the FIFO is empty, and all
array elements are owned by the producer. If the consume index equals the produce
index plus one, then the array is full and all array elements (except the one at the
•
•
Ownership of the descriptor structure and corresponding status structure is
passed by the device driver to the Ethernet module, which reads the descriptor
structure and writes information to the status structure.
The Ethernet module passes ownership of the descriptor structure back to the
device driver, which uses the information in the status structure and then recycles
both to be used for another packet.
Rev. 1 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
23-35
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