peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 115

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

2.7.3.2
The test configuration register is memory mapped register, at address C003
bit
TESTCONFR
bit
TESTCONFR
Note: Bits 8…0 are unused and are read as ‘0’.
PWB
OAKE
CIRE
P3E, P2E, P1E, P0E Program RAM Enables reflect the value of the BSN input of the
Semiconductor Group
Test Configuration Register (TESTCONFR)
15
7
PWB
0
Used as RAM’S Power Down Bypass. This bit can be read/write
by the SW. Cleared after reset.
Memory Enable of the OAK. This bit is the value of the OAK
memory enable signal (PMEMENP) in the previous cycle.
It enables observabilty of this signal. This bit is read only.
Circular buffer enable. This bit is the previous cycle value of the
circular buffer enable signal which is combination of the OAK
PMEMENP and the PEDIU request because they both can use
the RAM. This bit is read only.
four Program RAMs for enabling observability. If the BSN inputs
of the Program RAMs are stuck to zero, the RAM will work
properly and the only effect will be more current.
14
6
OAKE
0
13
5
CIRE
0
2-69
12
4
P3E
0
11
3
P2E
Functional Block Description
0
10
2
P1E
0
9
1
P0E
0
PEB 20560
H
8
0
2003-08
0
0