peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 293
peb20560
Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20560.pdf
(433 pages)
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Semiconductor Group
MFTO
MFAB
MFAE
MFRW
MFFE
5.1.1.4.29 Command Register EPIC
Access: write
Reset value: 00
Writing a logical 1 to a CMDR-register bit starts the respective operation.
ST
TIG
bit 7
0
PBNR-value and the applied clock and framing signals (PDC/PFS) or
OMDR:OMS0 = 0.
MF-Channel Transfer in Operation.
0…no MF-channel transfer is in operation.
1…an MF-channel transfer is in operation.
MF-Channel Transfer Aborted.
0…the remote receiver did not abort a handshake message transfer.
1…the remote receiver aborted a handshake message transfer.
MFFIFO-Access Enable.
0…the MFFIFO may not be accessed.
1…the MFFIFO may be either read or written to.
MFFIFO Read/Write.
0…the MFFIFO is ready to be written to.
1…the MFFIFO may be read.
MFFIFO Empty
0…the MFFIFO is not empty.
1…the MFFIFO is empty.
Start Timer.
0…not action. If the timer shall be stopped, the TIMR-register must simply
1…starts the timer to run cyclically from 0 to the value programmed in
Timer Interrupt Generation.
0…setting the TIG-bit to logical 0 together with the CMDR:ST-bit set to
1…setting the TIG-bit to logical 1 together with CMDR:ST-bit set to logical1
ST
logical 1 disables the interrupt generation.
causes the EPIC-1 to generate a periodic interrupt (ISTA:TIN) each time
the timer expires.
H
be written with a random value.
TIMR:TVAL6…0.
TIG
CFR
®
-1 (CMDR_E)
5-50
MFT1
MFT0
Description of Registers
MFSO
PEB 20560
bit 0
MFFR
2003-08
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