peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 121

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

According to the strap pins, the download of the program RAM starts, and also the type
of emulation (in case of emulation boot i.e. parallel/serial).
2.7.9.2
The emulation boot supports the down-loading of software code from an external dual
ported RAM (Mail Box buffer), loaded earlier by the debugger host, to the program RAM.
Two specified addresses in the Mail Box have to be with following data
Table 2-19
Address
0xF400
0xF401
2.7.9.3
The debugger should activate the BOOT and DBG strap pins, on reset negation.
As a result, the program jumps to the boot routine. The Mail Box is accessed (read) using
the data memory control signal.
The software uses the movd command of the OAK to write to the program RAM.
The last instruction of the boot routine is TRAP to pass control to the monitor program.
2.7.9.4
The purpose of this mode is to down-load the application program from a slow memory
device to the program RAM in order to execute the program after boot from the RAM with
zero w.s. The external hardware will include EPROM or ROM which will be connected to
the CBR signal and a program RAM which will be connected to the CDPW.
The specified address in the EPROM will include:
• Control word
• The number of words to be loaded.
• The first program RAM address to load to.
If the BOOT and ROM strap pins are active during reset negation and the DBG is not
active, the boot routine starts performing the Boot ROM download. The EPM bit in the
BOOTCONF register, is set by the HW. As a result, all read transactions, in movp
instructions, will be from the BOOT EPROM which means that the boot EPROM will be
located in the program address space. The movp instruction will put the data in a
temporary location in the data memory, from which it will be transferred to the external
RAM using movd instruction.
The ROM data structure is illustrated bellow, this structure will enable the user to
down-load a few blocks of code from the EPROM into different locations in the
Semiconductor Group
Emulation Boot
Boot Procedure
Boot ROM
Contents
The number of words to be loaded.
The first program RAM address to load to.
2-75
Functional Block Description
Value
PEB 20560
2003-08