peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 273

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
URE
Note: If EMOD:ECMD2 is set to ‘0’ some restrictions apply to the setting of PCSR
5.1.1.4.6
Access: read/write
Reset value: xx
IPN
TSN6…0
5.1.1.4.7
Access: read/write
Reset value: 00
CSS
bit 7
bit 7
CSS
IPN
(see chapter 5.1.1.3).
PCM-Input Comparison Mismatch (PICM)
Configurable Interface Mode Register 1 (CMD1)
Upstream Rising Edge.
0…the PCM-data is transmitted with the falling edge of PDC
1…the PCM-data is transmitted with the rising edge of PDC
Input Pair Number.
This bit denotes the pair of ports, where a bit mismatch occurred.
0…mismatch between ports 0 and 1
1…mismatch between ports 2 and 3
Time-Slot Number.
When a bit mismatch occurred these bits identify the affected bit position.
Table 5-31
PCM-Mode
0
1, 3
2
Clock Source Selection.
0…PDC and PFS are used as clock and framing source for the CFI. Clock
TSN6
CSM
H
H
CSP1
TSN5
Time-Slot Identification
TSN6…TSN2 + 2
TSN6…TSN1 + 4
TSN6…TSN0 + 8
CSP0
TSN4
5-30
CMD1
TSN3
CMD0
TSN2
Bit Identification
TSN1, 0: 00 bits 6,7
01 bits 4,5
10 bits 2,3
11 bits 0,1
TSN0: 0 bits 4…7
1 bits 0…3
Description of Registers
TSN1
CIS1
PEB 20560
bit 0
bit 0
TSN0
CIS0
2003-08