peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 150

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
Table 2-24 Specification of the Time-Slot Quadruplet that Controlled by Each Bit
UOSBPER
Bit
OSBPE0
OSBPE1
OSBPE2
OSBPE3
OSBPE4
OSBPE5
OSBPE6
OSBPE7
OSBPE8
OSBPE9
OSBPE10
OSBPE11
OSBPE12
OSBPE13
OSBPE14
OSBPE15
The bit sequence in the read word will be the same as in UOSBPER.
2.8.2.5
This 16-bit register determines the selection of output stream time-slots of every frame
in which the PEDIU will or will not drive the DU0 (Data Upstream input) of ELIC0 and
DU1 of ELIC1. The time-slots in which the PEDIU does not drive DU-lines give external
IOM-2-devices the opportunity to drive these lines. Each bit in UTSR controls whether
the PEDIU will drive the DU-lines during quadruplet of 4 sequential time-slots. During its
related time-slot quadruplet, every such bit is driven into the IOM-2-MUX, where it
controls which unit the DU-lines will be driven by.
The related sequential time-slot quadruplet of each UTSR bit and the output stream that
this quadruplet belongs to (OUT0 or OUT1) are different when PEDIU is in work mode 0
or 1 than when PEDIU is in work mode 2 − as in UISBPER and UOSBPER. For more
details see section 2.8.2.3.
PEDIU Tri-State Register (UTSR)
in UOSBPER, in the Different Work Modes of the PEDIU
Output Stream Time-Slots
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
Mode 0/1/2
0-3
4-7
8-11
12-15
16-19
20-23
24-27
28-31
0-3
4-7
8-11
12-15
16-19
20-23
24-27
28-31
2-104
Output Stream Time-Slots
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
OUT0
Functional Block Description
Mode 3/4
0-3
4-7
8-11
12-15
16-19
20-23
24-27
28-31
32-35
36-39
40-43
44-47
48-51
52-55
56-59
60-63
PEB 20560
2003-08