peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 234

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peb20560

Manufacturer Part Number
peb20560
Description
Dsp Oriented Pbx Controller Doc
Manufacturer
Infineon Technologies Corporation
Datasheet

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Semiconductor Group
3.2
The SIDEC is a 4-channel signaling controller containing sliphtly SACCO modules and
a control logic for DRDY handling (Stop/Go signal from QUAT-S).
To initialize one of the SIDEC’s, the CPU has to write a minimum set of registers.
Depending on the operating mode and on the features required, an optional set of
registers must also be initialized.
As the first register to be initialized, the MODE-register defines operating and address
mode. If data reception shall be performed, the receiver must be activated by setting the
RAC-bit. Depending on the mode selected, the following registers must also be defined:
Table 3-5 Mode Dependent Register Set-up
Transparent mode 1
Non-auto mode
Auto-mode
The second minimum register to be initialized is the CCR2. In combination with the
CCR1, the CCR2 defines the configuration of the serial port. It also allows enabling the
RFS-interrupt. Another function of CCR2 is to define the operating mode for the
D-channel ready input (DRDY).
Depending on the features desired, the following registers may also require initializing
before powering up the SIDEC:
Table 3-6 Feature Dependent Register Set-up
Feature
Time-slot assignment
Masking selected interrupts
Check on receive length
SIDEC
1 Byte Address
RAH1 = 00
RAH2 = 00
RAL1
RAL2
XAD1
XAD2
RAH1 = 00
RAH2
RAL1
RAL2
3-28
Register(s)
TSAR, TSAC, XCCR, RCCR
MASK
RLCR
H
H
H
Operational Description
2 Byte Address
RAH1
RAH2
RAH1
RAH2
RAL1
RAL2
XAD1
XAD2
RAH1
RAH2
RAL1
RAL2
PEB 20560
2003-08

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