hyb18t512160afl-3.7 Infineon Technologies Corporation, hyb18t512160afl-3.7 Datasheet - Page 34

• Manufacturer Part Number: hyb18t512160afl-3.7
• Description: 512-mbit Ddr2 Sdram
• Manufacturer: Infineon Technologies Corporation

Table 12
Field
BA2
BA1
BA0
A
1) w = write only
3.12
DDR2 SDRAM supports driver calibration feature and
the flow chart below is an example of the sequence.
Every calibration mode command should be followed
by “OCD calibration mode exit” before any other
Data Sheet
Bits
16
15
14
[13:0] w
EMR(3) Programming Extended Mode Register Definition (BA[2:0]=010
Off-Chip Driver (OCD) Impedance Adjustment
reg.addr
Type
1)
Description
Bank Address[2]
Note: BA2 is not available on 256Mbit and 512Mbit components
0
Bank Adress[1]
1
Bank Adress[0]
1
Address Bus[13:0]
Note: A13 is not available for 256 Mbit and x16 512 Mbit configuration
0
B
B
B
B
BA2, Bank Address
BA1, Bank Address
BA0, Bank Address
A[13:0], Address bits
35
command being issued. MRS should be set before
entering OCD impedance adjustment and On Die
Termination (ODT) should be carefully controlled
depending on system environment.
HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
Functional Description
B
09112003-SDM9-IQ3P
)
Rev. 1.6, 2005-08