hyb18t512160afl-3.7 Infineon Technologies Corporation, hyb18t512160afl-3.7 Datasheet - Page 9

• Manufacturer Part Number: hyb18t512160afl-3.7
• Description: 512-mbit Ddr2 Sdram
• Manufacturer: Infineon Technologies Corporation

List of Figures
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Data Sheet
Self Refresh Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Active Power-Down Mode Entry and Exit after an Activate Command . . . . . . . . . . . . . . . . . . . . . 70
Active Power-Down Mode Entry and Exit Example after a Read Command . . . . . . . . . . . . . . . . . 71
Active Power-Down Mode Entry and Exit Example after a Write Command . . . . . . . . . . . . . . . . . 71
Active Power-Down Mode Entry and Exit Example after a Write Command with AP . . . . . . . . . . 72
Precharge Power Down Mode Entry and Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Auto-Refresh command to Power-Down entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
MRS, EMRS command to Power-Down entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Input Frequency Change Example during Precharge Power-Down mode . . . . . . . . . . . . . . . . . . . 74
Asynchronous Low Reset Event. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Single-ended AC Input Test Conditions Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Differential DC and AC Input and Output Logic Levels Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Full Strength Default Pull-up Driver Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Full Strength Default Pull–down Driver Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Reduced Strength Default Pull-up Driver Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Reduced Strength Default Pull–down Driver Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
AC Overshoot / Undershoot Diagram for Address and Control Pins . . . . . . . . . . . . . . . . . . . . . . . 90
AC Overshoot / Undershoot Diagram for Clock, Data, Strobe and Mask Pins . . . . . . . . . . . . . . . . 90
Reference Load for Timing Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Input Setup and Hold Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Data Setup and Hold Time (Differential Data Strobes) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Data Setup and Hold Time (Single Ended Data Strobes) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Slew Rate Definition Nominal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Slew Rate Definition Tangent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Package Pinout PG-TFBGA-60 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Package Pinout PG-TFBGA-84 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
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HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
09112003-SDM9-IQ3P
Rev. 1.6, 2005-08