hyb18t512160afl-3.7 Infineon Technologies Corporation, hyb18t512160afl-3.7 Datasheet - Page 83

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hyb18t512160afl-3.7

Manufacturer Part Number
hyb18t512160afl-3.7
Description
512-mbit Ddr2 Sdram
Manufacturer
Infineon Technologies Corporation
Datasheet
Figure 67
5.5.1
DDR2 SDRAM output driver characteristics are defined
for full strength calibrated operation as selected by the
procedure outlined in the Off-Chip Driver (OCD)
Impedance Adjustment. The
show the data in tabular format suitable for input into
simulation tools. The nominal points represent a device
at exactly 18 ohms. The nominal low and nominal high
values represent the range that can be achieved with a
maximum 1.5 ohms step size with no calibration error
at the exact nominal conditions only (i.e. perfect
calibration procedure, 1.5 ohm maximum step size
guaranteed by specification). Real system calibration
error needs to be added to these values. It must be
understood that these V-I curves are represented here
or in supplier IBIS models need to be adjusted to a
wider range as a result of any system calibration error.
Since this is a system specific phenomena, it cannot be
quantified here. The values in the calibrated tables
represent just the DRAM portion of uncertainty while
Data Sheet
Full Strength Default Pull–down Driver Diagram
Calibrated Output Driver V-I Characteristics
Table 36
and
Table 37
84
looking at one DQ only. If the calibration procedure is
used, it is possible to cause the device to operate
outside the bounds of the default device characteristics
tables and figure. In such a situation, the timing
parameters in the specification cannot be guaranteed.
It is solely up to the system application to ensure that
the device is calibrated between the minimum and
maximum default values at all times. If this can’t be
guaranteed by the system calibration procedure, re-
calibration policy and uncertainty with DQ to DQ
variation, it is recommended that only the default
values to be used. The nominal maximum and
minimum values represent the change in impedance
from nominal LOW and HIGH as a result of voltage and
temperature change from the nominal condition to the
maximum and minimum conditions. If calibrated at an
extreme condition, the amount of variation could be as
much as from the nominal minimum to the nominal
maximum or vice versa.
HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
AC & DC Operating Conditions
512-Mbit DDR2 SDRAM
09112003-SDM9-IQ3P
Rev. 1.6, 2005-08

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