tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 161

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tmp19a43fzxbg

Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
3.8.4.7
Endian mode
will assemble or disassemble data in the DHR register.
device is a memory device, and the unit of data transfer is 32 bits, the DMAC reads data from the I/O
device four times and assembles it into 32 bits of data in the DHR register before writing it to
memory.
DHR register.
4n + 3
4n + 2
4n + 1
4n + 0
If the unit of data transfer and the device port size are not equal in dual-address mode, the DMAC
For example, if the source device is an I/O device whose port size is 8 bits while the destination
For example, the diagram below shows the relationship between an 8-bit I/O device and a 32-bit
The TMP1942 supports only little-endian data alignment.
Big endian
Little endian
8
I/O device
D
C
B
A
Figure 3.8.14 Data Packing and Unpacking
0
31
31
A
D
TMP1942CY/CZ-160
B
C
DHR
C
B
D
A
TMP1942CY/CZ
0
0

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