tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 396

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

6.4.2
6.4.3
The SAMPLE/PRELOAD Instruction
The BYPASS Instruction
implies, two functions are performed through use of the SAMPLE/ PRELOAD instruction.
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•
minimum length serial path through the IC (or between JTDI and JTDO) when the IC is not required for
the current test. The BYPASS instruction does not cause interference to the normal operation of the
on-chip system logic. The flow of data through the bypass register while the BYPASS instruction is
selected is shown in Figure 6.4.4.
This instruction targets the boundary scan register between TDI and TDO. As the instruction's name
This instruction targets the bypass register between JTDI and JTDO. The bypass register provides a
SAMPLE allows the input and output pads of an IC to be monitored. While it does so, it does not
PRELOAD allows the boundary scan register to be initialized before another instruction is selected.
disconnect the system logic from the IC pins. The SAMPLE function occurs in the Capture-DR
controller state. An example application of SAMPLE is to take a snapshot of the activity of the IC's
I/O pins so as to verify the interaction between ICs during normal functional operation. The flow of
data for the SAMPLE phase of the SAMPLE/PRELOAD instruction is shown in Figure 6.4.2.
For example, prior to selection of the EXTEST instruction, initialization data is shifted into the
boundary scan register using PRELOAD as described in the previous subsection. PRELOAD
permits shifting of the boundary scan register without interfering with the normal operation of the
system logic. The flow of data for the PRELOAD phase of the SAMPLE/PRELOAD instruction is
shown in Figure 6.4.3.
Figure 6.4.4 Test Data Flow While the Bypass Instruction is Selected
INPUT
INPUT
TDI
TDI
Figure 6.4.3 Test Data Flow While PRELOAD is Selected
TDI
Figure 6.4.2 Test Data Flow While SAMPLE is Selected
TMP1942CY/CZ-395
Boundary Scan Path
Boundary Scan Path
Bypass Register
Core Logic
Core Logic
1-bit
TMP1942CY/CZ
TDO
OUTPUT
TDO
OUTPUT
TDO