tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 319

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tmp19a43fzxbg

Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
ADREG4CL
(0xFFFF_F308)
ADREG4CH
(0xFFFF_F309)
ADREG5DL
(0xFFFF_F30A)
ADREG5DH
(0xFFFF_F30B)
Note1: Bit 0 is the A/D conversion result store flag ADRxRF. This bit is set to 1 when an A/D converted
Note2: Bit 1 is the overrun flag OVRx. This bit is set to 1 when the next conversion result is written before
value is stored in the register pair. This bit is cleared to 0 when the lower register (ADREGxL) is read.
both conversion result registers (ADREGxH and ADREGxL) have been read. Reading the flag
clears the bit.
Converted value for channe
Bit symbol
Read/Write
After Reset
Function
Bit symbol
Read/Write
After Reset
Function
Bit symbol
Read/Write
After Reset
Function
Bit symbol
Read/Write
After Reset
Function
x
Stores lower 2 bits of A/D
conversion result
Stores lower 2 bits of A/D
conversion result
ADR41
ADR51
ADR49
ADR59
7
7
7
7
Undefined
Undefined
Figure 3.13.2 A/D Converter Registers (8/12)
A/D Conversion Result Lower Register 4C
A/D Conversion Result Upper Register 4C
A/D Conversion Result Lower Register 19
A/D Conversion Result Upper Register 19
R
R
ADREGxH
ADR40
ADR50
9
ADR48
ADR58
7
6
6
6
6
8
6
TMP1942CY/CZ-318
7
5
ADR47
ADR57
Stores upper 8 bits of A/D conversion result
Stores upper 8 bits of A/D conversion result
5
5
4
5
5
6
3
5
2
ADR46
ADR56
4
4
4
4
4
1
Undefined
Undefined
3
0
R
R
2
ADR45
ADR55
3
3
3
3
1
7
0
6
Bits 2 to 5 are always read as 1s.
ADR44
ADR54
5
TMP1942CY/CZ
2
2
2
2
4
Overrun flag
0: No overrun
1: Overrun
Overrun flag
0: No overrun
1: Overrun
3
occurred
occurred
occurred
occurred
ADR43
ADR53
OVR4
OVR5
2
1
R
1
R
0
1
0
1
ADREGxL
1
A/D conversion
result store flag
1: Conversion
A/D conversion
result store flag
1: Conversion
0
ADR4RF
ADR5RF
result stored
ADR42
result stored
ADR52
R
0
R
0
0
0
0
0

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