tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 365

• Manufacturer Part Number: tmp19a43fzxbg
• Description: 32bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

*WAIT = 0
AC measurement conditions:
No.
10
11
12
13
14
15
16
17
18
19
20
21
W: Number of wait-state cycles inserted (0 to 7 for programmed wait insertion)
N : Value of N for (1 + N) wait insertion
1
2
3
4
5
6
7
8
9
• Output levels: High = 2.4 V, Low = 0.45 V, CL = 30 pF
• Input levels: High = 2 V, Low = 0.6 V
System clock period (x)
A0–A15 valid to ALE low
A0–A15 hold after ALE low
ALE pulse width high
ALE low to RD or WR asserted
A0–A15 valid to RD or WR asserted
A0–A23 valid to RD or WR asserted
A0–A23 hold after RD or WR negated
A0–A15 valid to D0–D15 data in
A0–A23 valid to D0–D15 data in
D0–D15 hold after RD negated
D0–D15 valid to WR negated
D0–D15 hold after WR negated
A0–A23 valid to WAIT input
A0–A15 valid to WAIT input
RD or WR negated to ALE high
RD asserted to D0–D15 data in
RD width low
RD negated to next A0–A15 output
WR width low
WAIT hold after RD or WR asserted
(2)V CC = 3.0 ~ 3.6 V, Ta = 0 ~ 70°C, ALE = 1.5 clock cycles
Parameter
TMP1942CY/CZ-364
Symbo
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SYS
AL
LA
LL
LC
CL
ACL
ACH
CA
ADL
ADH
RD
RR
HR
RAE
WW
DW
WD
AWH
AWL
CW
l
(0.5 + N − 1) x
x (1 + W) − 10
x (1 + W) − 10
x (1 + W) − 18
1.4x – 12
0.4x – 8
1.4x – 6
0.4x – 8
2x − 20
2x − 20
x − 15
x − 15
x − 15
x − 15
31.25
Min
+ 2
0
Equation
x (3 + W) − 42
x (3 + W) − 42
x (1 + W) − 28
(0.5 + N) x
2.5x − 30
2.5x − 30
33333
Max
− 17
TMP1942CY/CZ
32 MHz(fsys)*
Min
31
37
16
42
42
16
21
16
21
13
16
18
4
4
0
Max
51
51
48
48
29
3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns