tmp19a43fzxbg TOSHIBA Semiconductor CORPORATION, tmp19a43fzxbg Datasheet - Page 330
tmp19a43fzxbg
Manufacturer Part Number
tmp19a43fzxbg
Description
32bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A43FZXBG.pdf
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Note:
PHYT0
16MHz
12 MHz
10 MHz
8 MHz
4 MHz
2MHz
The maximum conversion speed, that is, the minimum conversion time this A/D converter can achieve is 2 μs.
However, 4 μs is required before the first conversion result can be retrieved from the conversion result register
(or a maximum of 5 μs is required depending on the conversion start request timing because of the interface
between the system clock and A/D conversion clock). Subsequently, conversion results can be obtained every
2 μs. Therefore, in single conversion mode or highest-priority conversion mode, A/D conversion requires 4 or 5
times the conversion time shown in the above table. In repeated conversion or scan mode, only the first
conversion requires 4 or 5 times the table value (a maximum of 4 to 5 μs) but subsequent conversions are
performed within the time shown in the table (a maximum of 2 μs).
Invalid setting
Invalid setting
Invalid setting
Invalid setting
Invalid setting
Invalid setting
Table 3.13.3 Example A/D Conversion Settings (2)
f
adc
TMP1942CY/CZ-329
Invalid setting
Invalid setting
Invalid setting
Invalid setting
Invalid setting
f
2 μsec
adc
/2
Conversion Clock
Invalid setting
Invalid setting
Invalid setting
Invalid setting
f
2 μsec
4 μsec
adc
/4
Invalid setting
Invalid setting
Invalid setting
f
2 μsec
4 μsec
8 μsec
TMP1942CY/CZ
adc
/8
@f = 32 MHz
f
2.8μsec
3.2μsec
16 μsec
adc
2 μsec
8 μsec
4 μsec
/16
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