r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 1133

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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24.1
The registers relating to the power-down mode are shown below. For details on the PLL control
register (PLLCR), see section 23.1.2, PLL Control Register (PLLCR).
• PLL control register (PLLCR)
• Standby control register (SBYCR)
• Module stop control register H (MSTPCRH)
• Module stop control register L (MSTPCRL)
• Extension module stop control register H (EXMSTPCRH)
• Extension module stop control register L (EXMSTPCRL)
• RAM module stop control register H (RMMSTPCRH)
• RAM module stop control register L (RMMSTPCRL)
24.1.1
SBYCR performs software standby mode control.
Bit
7
6
Bit Name
SSBY
OPE
Register Descriptions
Standby Control Register (SBYCR)
Initial Value
0
1
R/W
R/W
R/W
Description
Software Standby
This bit specifies the transition mode after
executing the SLEEP instruction
0: Shifts to sleep mode after the SLEEP
1: Shifts to software standby mode after the
This bit does not change from 1 when clearing the
software standby mode by using external
interrupts and shifting to normal operation. This bit
should be written 0 when clearing.
Output Port Enable
Specifies whether the output of the address bus
and bus control signals (CS0 to CS7, AS, RD,
HWR, LWR, UCAS, LCAS) is retained or set to the
high-impedance state in software standby mode.
0: In software standby mode, address bus and bus
1: In software standby mode, address bus and bus
instruction is executed
SLEEP instruction is executed
control signals are high-impedance
control signals retain output state
Rev. 1.00 Sep. 19, 2008 Page 1105 of 1270
Section 24 Power-Down Modes
REJ09B0466-0100

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