r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 1138

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 24 Power-Down Modes
• RMMSTPCRL
Note:
24.2
24.2.1
When bits STC1 and STC0 in PLLCR are set to 11, a transition is made to clock division mode,
and the system clock frequency is divided with respect to the oscillator frequency. Clock division
mode is cancelled by clearing bits STC1 and STC0 to a value other than 11. The timings of
transition and clearing depend on the STCS bit setting in SCKCR. For the operation at transition
and clearing, see section 23.3, System-Clock PLL Circuit and Divider.
If a SLEEP instruction is executed while the SSBY bit in SBYCR is cleared to 0, the chip enters
sleep mode. When sleep mode is cleared by an interrupt, clock division mode is restored.
If a SLEEP instruction is executed while the SSBY bit in SBYCR is set to 1, the chip enters
software standby mode. When software standby mode is cleared by an external or internal
interrupt, clock division mode is restored.
When the RES pin is driven low, the reset state is entered and clock division mode is cleared. The
same applies to a reset caused by watchdog timer overflow.
When the STBY pin is driven low, a transition is made to hardware standby mode.
Rev. 1.00 Sep. 19, 2008 Page 1110 of 1270
REJ09B0466-0100
Bit
7
6
5
4
3
2
1
0
Bit Name
MSTP39
MSTP38
MSTP37
MSTP36
MSTP35
MSTP34
MSTP33
MSTP32
*
Operation
Clock Division Mode
Not supported by the H8S/24268R, H8S/24268, H8S/24265R, H8S/24265,
H8S/24261R, H8S/24261, H8S/24248, H8S/24245, and H8S/24241 Groups.
Although these bits are readable/writable, only 1 should be written to.
0
0
0
0
0
0
0
0
Initial Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Module
On-chip RAM_7 (H'FEC000 to H'FEDFFF)*
On-chip RAM_6 (H'FEE000 to H'FEFFFF)*
On-chip RAM_5 (H'FF0000 to H'FF1FFF)
On-chip RAM_4 (H'FF2000 to H'FF3FFF)
On-chip RAM_3 (H'FF4000 to H'FF5FFF)
On-chip RAM_2 (H'FF6000 to H'FF7FFF)
On-chip RAM_1 (H'FF8000 to H'FF9FFF)
On-chip RAM_0 (H'FFA000 to H'FFBFFF)

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