r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 939

no-image

r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
r4f24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
r4f24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24268NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
r4f24268NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24268NVZFQV
Manufacturer:
REA
Quantity:
150
Part Number:
r4f24268NVZFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r4f24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
r4f24269NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
15.9
15.9.1
Table 15.13 shows the interrupt sources in normal serial communication interface mode. A
different interrupt vector is assigned to each interrupt source, and individual interrupt sources can
be enabled or disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt can activate the DTC or
DMAC to perform data transfer. The TDRE flag is cleared to 0 automatically when data transfer is
performed by the DTC or DMAC.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt
request can activate the DTC or DMAC to perform data transfer. The RDRF flag is cleared to 0
automatically when data transfer is performed by the DTC or DMAC.
A TEI interrupt is generated when the TEND flag is set to 1 while the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are generated simultaneously, the TXI interrupt has priority for
acceptance. However, note that if the TDRE and TEND flags are cleared simultaneously by the
TXI interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Interrupt Sources
Interrupts in Normal Serial Communication Interface Mode
Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 1.00 Sep. 19, 2008 Page 911 of 1270
REJ09B0466-0100

Related parts for r4f2426