r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 449

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

8.4.7
EXDMAC register values are updated as DMA transfer processing is performed. The updated
values depend on various settings and the transfer status. The following registers and bits are
updated: EDSAR, EDDAR, EDTCR, and bits EDA, BEF, and IRF in EDMDR,
(1)
When the EDSAR address is accessed as the transfer source, after the EDSAR value is output,
EDSAR is updated with the address to be accessed next. Bits SAT1 and SAT0 in EDACR specify
incrementing or decrementing. The address is fixed when SAT1 = 0, incremented when SAT1 = 1
and SAT0 = 0, and decremented when SAT1 = 1 and SAT0 = 1.
The size of the increment or decrement is determined by the size of the data transferred. When the
DTSIZE bit in EDMDR = 0, the data is byte-size and the address is incremented or decremented
by 1; when DTSIZE = 1, the data is word-size and the address is incremented or decremented by
2.
When a repeat area setting is made, the operation conforms to that setting. The upper part of the
address set for the repeat area function is fixed, and is not affected by address updating.
When EDSAR is read during a transfer operation, a longword access must be used. During a
transfer operation, EDSAR may be updated without regard to accesses from the CPU, and the
correct values may not be read if the upper and lower words are read separately. In a longword
access, the EXDMAC buffers the EDSAR value to ensure that the correct value is output.
Do not write to EDSAR for a channel on which a transfer operation is in progress.
(2)
When the EDDAR address is accessed as the transfer destination, after the EDDAR value is
output, EDDAR is updated with the address to be accessed next. Bits DAT1 and DAT0 in
EDACR specify incrementing or decrementing. The address is fixed when DAT1 = 0, incremented
when DAT1 = 1 and DAT0 = 0, and decremented when DAT1 = 1 and DAT0 = 1.
The size of the increment or decrement is determined by the size of the data transferred. When the
DTSIZE bit in EDMDR = 0, the data is byte-size and the address is incremented or decremented
by 1; when DTSIZE = 1, the data is word-size and the address is incremented or decremented by
2.
When a repeat area setting is made, the operation conforms to that setting. The upper part of the
address set for the repeat area function is fixed, and is not affected by address updating.
EXDMA Source Address Register (EDSAR)
EXDMA Destination Address Register (EDDAR)
Registers during DMA Transfer Operation
Rev. 1.00 Sep. 19, 2008 Page 421 of 1270
Section 8 EXDMA Controller (EXDMAC)
REJ09B0466-0100