r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 934
r4f2426
Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R4F2426.pdf
(1302 pages)
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Section 15 Serial Communication Interface (SCI, IrDA)
15.7.8
When the GM bit in SMR is set to 1, the clock output level can be fixed with bits CKE1 and
CKE0 in SCR. At this time, the minimum clock pulse width can be made the specified width.
Figure 15.31 shows the timing for fixing the clock output level. In this example, GM is set to 1,
CKE1 is cleared to 0, and the CKE0 bit is controlled.
When turning on the power or switching between Smart Card interface mode and software
standby mode, the following procedures should be followed in order to maintain the clock duty
cycle.
Powering On: To secure the clock duty cycle from power-on, the following switching procedure
should be followed.
1. The initial state is port input and high impedance. Use a pull-up resistor or pull-down resistor
2. Fix the SCK pin to the specified output level with the CKE1 bit in SCR.
3. Set SMR and SCMR, and switch to Smart Card mode operation.
4. Set the CKE0 bit in SCR to 1 to start clock output.
When Changing from Smart Card Interface Mode to Software Standby Mode:
1. Set the data register (DR) and data direction register (DDR) corresponding to the SCK pin to
2. Write 0 to the TE bit and RE bit in the serial control register (SCR) to halt transmit/receive
3. Write 0 to the CKE0 bit in SCR to halt the clock.
Rev. 1.00 Sep. 19, 2008 Page 906 of 1270
REJ09B0466-0100
to fix the potential.
the value for the fixed output state in software standby mode.
operation. At the same time, set the CKE1 bit to the value for the fixed output state in software
standby mode.
CKE0
SCK
Clock Output Control
Figure 15.31 Timing for Fixing Clock Output Level
Specified pulse width
Specified pulse width
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