r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 173

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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This LSI has an on-chip bus controller (BSC) that manages the external address space divided into
eight areas.
The bus controller also has a bus arbitration function, and controls the operation of the bus
mastershipthe CPU, DMA controller (DMAC), EXDMA controller (EXDMAC)*, and data
transfer controller (DTC). A block diagram of the bus controller is shown in figure 6.1.
Note: * Not supported by the H8S/2424 Group.
6.1
• Manages external address space in area units
• Basic bus interface
• Burst ROM interface
• Address/data multiplexed I/O interface
• DRAM interface
• Synchronous DRAM interface*
Manages the external address space divided into eight areas of 2 Mbytes
Bus specifications can be set independently for each area
Burst ROM, DRAM, synchronous DRAM*
be set
Chip select signals (CS0 to CS7) can be output for areas 0 to 7
8-bit access or 16-bit access can be selected for each area
2-state access or 3-state access can be selected for each area
Program wait cycles can be inserted for each area
Extension cycles can be inserted while CS is asserted for each area
Wait cycles can be inserted by the WAIT pin
The negation timing of the read strobe signal (RD) can be modified
Burst ROM interface can be set independently for areas 0 and 1
Address/data multiplexed I/O interface can be set for areas 6 and 7
DRAM interface can be set for areas 2 to 5
Continuous synchronous DRAM space can be set for areas 2 to 5
Features
Section 6 Bus Controller (BSC)
1
1
, and address/data multiplexed I/O interfaces can
Rev. 1.00 Sep. 19, 2008 Page 145 of 1270
Section 6 Bus Controller (BSC)
REJ09B0466-0100

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