r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 308

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 6 Bus Controller (BSC)
(4)
Depending on the system’s load conditions, the RD signal may lag behind the CS signal. An
example is shown in figure 6.80. In this case, with the setting for no idle cycle insertion (a), there
may be a period of overlap between the bus cycle A RD signal and the bus cycle B CS signal.
Setting idle cycle insertion, as in (b), however, will prevent any overlap between the RD and CS
signals. In the initial state after reset release, idle cycle insertion (b) is set.
Rev. 1.00 Sep. 19, 2008 Page 280 of 1270
REJ09B0466-0100
Relationship between Chip Select (CS) Signal and Read (RD) Signal
Address bus
CS (area A)
CS (area B)
Figure 6.80 Relationship between Chip Select (CS) and Read (RD)
RD
Overlap period between CS (area B)
and RD may occur
φ
(a) No idle cycle insertion
T
(ICIS1 = 0)
1
Bus cycle A
T
2
T
3
Bus cycle B
T
1
T
2
Address bus
CS (area A)
CS (area B)
RD
φ
T
(b) Idle cycle insertion
1
Bus cycle A
(ICIS1 = 1, initial value)
T
2
T
3
Idle cycle
T
i
Bus cycle B
T
1
T
2