r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 354

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 7 DMA Controller (DMAC)
(2)
• DMABCRH
Rev. 1.00 Sep. 19, 2008 Page 326 of 1270
REJ09B0466-0100
Bit
3
2
1
0
Bit
15
14
Full Address Mode:
Bit Name
DTIE1B
DTIE1A
DTIE0B
DTIE0A
Bit Name
FAE1
FAE0
Initial Value
0
0
0
0
Initial Value
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Full Address Enable 1
Full Address Enable 0
Description
Data Transfer End Interrupt Enable 1B
Data Transfer End Interrupt Enable 1A
Data Transfer End Interrupt Enable 0B
Data Transfer End Interrupt Enable 0A
These bits enable or disable an interrupt to the
CPU or DTC when transfer ends. If the DTIE bit is
set to 1 when DTE = 0, the DMAC regards this as
indicating the end of a transfer, and issues a
transfer end interrupt request to the CPU or DTC.
A transfer end interrupt can be canceled either by
clearing the DTIE bit to 0 in the interrupt handling
routine, or by performing processing to continue
transfer by setting the transfer counter and
address register again, and then setting the DTE
bit to 1.
Description
Specifies whether channel 1 is to be used in short
address mode or full address mode.
In full address mode, channels 1A and 1B are
used together as channel 1.
0: Short address mode
1: Full address mode
Specifies whether channel 0 is to be used in short
address mode or full address mode.
In full address mode, channels 0A and 0B are
used together as channel 0.
0: Short address mode
1: Full address mode

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