r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 977

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Note: * Ensure that no interrupts are received while steps [1] through [3] are being processed.
Additional information: If only one byte is received, steps [2] through [6] are omitted following step [1],
No
No
No
Set ACKBT = 0 (ICIER)
Set ACKBT = 1 (ICIER)
Set RCVD = 1 (ICCRA)
Set RCVD = 0 (ICCRA)
Set MST = 0 (ICCRA)
Set TRS = 0 (ICCRA)
Clear TDRE of ICSR
Dummy read ICDRR
Read RDRF in ICSR
Read RDRF in ICSR
Read STOP of ICSR
Clear TEND in ICSR
Clear STOP in ICSR
Mater receive mode
Write BBSY = 0
Read ICDRR
Read ICDRR
Read ICDRR
Last receive
and SCP = 0
RDRF=1 ?
RDRF=1 ?
STOP=1 ?
End
- 1?
Figure 16.15 Sample Flowchart for Master Receive Mode
Yes
Yes
Yes
No
and processing jumps to step [7]. Step [8] is ICDDR dummy read.
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Clear STOP flag.
[11] Stop condition issuance.
[12] Wait for the generation of stop condition.
[13] Read the receive data of the final byte.
[14] Clear RCVD to 0.
[15] Set slave receive mode.
Clear TEND, select master receive mode, and then clear TDRE. *
Set acknowledge to the transmitting device. *
Dummy read ICDDR. *
Wait for 1 byte to be received.
Check if the (last receive - 1).
Read the receive data.
Set acknowledge of the final byte. Disable continuous receive (RCVD = 1).
Read receive data of (final byte - 1).
Wait for the final byte to be received.
Rev. 1.00 Sep. 19, 2008 Page 949 of 1270
Section 16 I
2
C Bus Interface 2 (IIC2)
REJ09B0466-0100