r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 15

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 8 EXDMA Controller (EXDMAC) ......................................................393
8.1
8.2
8.3
8.4
8.5
8.6
Section 9 Data Transfer Controller (DTC) ........................................................461
9.1
9.2
9.3
Features.............................................................................................................................. 393
Input/Output Pins............................................................................................................... 395
Register Descriptions ......................................................................................................... 396
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
Operation ........................................................................................................................... 408
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.4.8
8.4.9
8.4.10 EXDMAC Bus Cycles (Single Address Mode) .................................................... 435
8.4.11 Examples of Operation Timing in Each Mode ..................................................... 440
8.4.12 Ending DMA Transfer .......................................................................................... 454
8.4.13 Relationship between EXDMAC and Other Bus Masters .................................... 455
Interrupt Sources................................................................................................................ 456
Usage Notes ....................................................................................................................... 458
Features.............................................................................................................................. 461
Register Descriptions ......................................................................................................... 463
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
9.2.7
9.2.8
9.2.9
Activation Sources............................................................................................................. 469
EXDMA Source Address Register (EDSAR)....................................................... 396
EXDMA Destination Address Register (EDDAR)............................................... 397
EXDMA Transfer Count Register (EDTCR)........................................................ 397
EXDMA Mode Control Register (EDMDR) ........................................................ 399
EXDMA Address Control Register (EDACR) ..................................................... 404
Transfer Modes..................................................................................................... 408
Address Modes ..................................................................................................... 409
DMA Transfer Requests ....................................................................................... 413
Bus Modes ............................................................................................................ 414
Transfer Modes..................................................................................................... 416
Repeat Area Function ........................................................................................... 418
Registers during DMA Transfer Operation .......................................................... 421
Channel Priority Order.......................................................................................... 425
EXDMAC Bus Cycles (Dual Address Mode) ...................................................... 428
DTC Mode Register A (MRA) ............................................................................. 463
DTC Mode Register B (MRB).............................................................................. 465
DTC Source Address Register (SAR)................................................................... 465
DTC Destination Address Register (DAR)........................................................... 465
DTC Transfer Count Register A (CRA) ............................................................... 466
DTC Transfer Count Register B (CRB)................................................................ 466
DTC Enable Registers A to I (DTCERA to DTCERI) ......................................... 467
DTC Vector Register (DTVECR)......................................................................... 467
DTC Control Register (DTCCR) .......................................................................... 468
Rev. 1.00 Sep. 19, 2008 Page xv of xxviii