s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 181

• Manufacturer Part Number: s71ws256nc0bawa30
• Description: Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
• Manufacturer: Meet Spansion Inc.

September 15, 2005 S71WS-N_01_A4
48.3.5
Synchronous Burst Read Suspend Timing Waveform
Latency = 5, Burst Length = 4, WP = Low enable (WE#= V
Notes:
1.
2.
3.
4.
LB#, UB#
WAIT#
CLK
ADV#
Address
CS#
OE#
Data out
If the clock input is halted during burst read operation, the data output will be suspended. During the burst read
suspend period, OE# high drives data output to high-Z. If the clock input is resumed, the suspended data will be
output first.
/WAIT Low (t
/WAIT High (t
/WAIT High-Z (t
During the suspend period, OE# high drives DQ to High-Z and OE# low drives DQ to Low-Z. If OE# stays low during
suspend period, the previous data will be sustained.
Burst Cycle Time (t
Symbol
t
t
t
t
t
t
OEL
OLZ
BEL
BLZ
CD
OH
t
AS(B)
A d v a n c e
Valid
WL
WH
0
Figure 48.10 Timing Waveform of Burst Read Suspend Cycle (1)
High-Z
WZ
or t
): Data available (driven by Latency-1 clock)
T
t
t
ADVS
CSS(B)
): Data don’t care (driven by CS# high going edge)
t
BC
ADVH
t
AWL
WL
Min
1
t
AH(B)
) should not be over 2.5µs.
—
1
1
5
5
3
Table 48.9 Burst Read Suspend AC Characteristics
): Data not available (driven by CS# low going edge or ADV# low going edge)
Don’t Ca re
Speed
Latency 5
2
I n f o r m a t i o n
t
t
BLZ
OLZ
Max
S71WS-Nx0 Based MCPs
10
—
—
—
—
—
3
t
t
BEL
OEL
4
t
WH
Undefined
Units
clock
ns
5
t
CD
t
BC
DQ0
6
DQ1
t
Symbol
OHZ
t
t
t
t
t
OHZ
WH
WL
WZ
HZ
High-Z
IH
, MRS# = V
t
OLZ
DQ1
Min
7
—
—
—
—
—
Speed
DQ2
IH
8
t
OH
).
Max
10
10
12
DQ3
7
7
9
t
WZ
t
HZ
1 0
Units
ns
11
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