s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 187

• Manufacturer Part Number: s71ws256nc0bawa30
• Description: Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
• Manufacturer: Meet Spansion Inc.

September 15, 2005 S71WS-N_01_A4
Latency = 5, Burst Length = 4 (MRS# = V
Notes:
1.
2.
3.
4.
LB#, UB#
CLK
ADV#
Address
CS#
WE#
OE#
Data in
Data out
WAIT#
The new burst operation can be issued only after the previous burst operation is finished. For the new burst operation,
t
/WAIT Low (t
/WAIT High (t
/WAIT High-Z (t
Multiple clock risings are allowed during low ADV# period. The burst operation starts from the first clock rising.
Burst Cycle Time (t
Table 49.6 Asynchronous Write (Low ADV# Type) to Burst Read AC Characteristics
BEADV
Symbol
t
BEADV
should be met.
t
Figure 49.6 Synchronous Burst Write to Synchronous Burst Read Timing
ADVS
A d v a n c e
High-Z
t
AS(B)
t
WES
WL
WH
Valid
t
WL
0
WZ
or t
): Data available (driven by Latency-1 clock)
T
): Data don’t care (driven by CS# high going edge)
BC
t
CSS(B)
AWL
t
1
Min
ADVH
) should not be over 2.5µs.
t
7
Latency 5
WEH
t
AH(B)
): Data not available (driven by CS# low going edge or ADV# low going edge)
Don’t Ca re
2
Speed
t
WH
3
I n f o r m a t i o n
t
BC
t
BS
Max
S71WS-Nx0 Based MCPs
—
D0
4
D1
5
t
BH
D2
6
High-Z
t
Units
DS
D3
ns
7
IH
).
8
t
DHC
t
BEADV
9
t
WZ
10 11
t
AS(B)
Symbol
Valid
t
WL
t
CSS(B)
12 13
t
AH(B)
Latency 5
14 15 16 17 18
Min
t
BC
t
t
OEL
t
WH
BEL
High- Z
Speed
t
CD
Max
DQ0 DQ1
t
OH
19 20
DQ2
Units
DQ3
t
HZ
21
185