s71ws256nc0bawa30 Meet Spansion Inc., s71ws256nc0bawa30 Datasheet - Page 46

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s71ws256nc0bawa30

Manufacturer Part Number
s71ws256nc0bawa30
Description
Stacked Multi-chip Product Mcp 256/512/128 Megabit 32m/16m/8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Flash Memory With 128/64megabit 8m/4m X 16-bit Psram.
Manufacturer
Meet Spansion Inc.
Datasheet
44
10.5.7
Cycle
Cycle
1
1
The system may also write the Autoselect command sequence when the device is in Program Sus-
pend mode. The device allows reading Autoselect codes in the suspended sectors, since the codes
are not stored in the memory array. When the device exits the Autoselect mode, the device re-
verts to Program Suspend mode, and is ready for another valid operation. See “Autoselect
Command Sequence” for more information.
After the Program Resume command is written, the device reverts to programming. The system
can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in
the standard program operation. See “Write Operation Status” for more information.
The system must write the Program Resume command (address bits are “don't care”) to exit the
Program Suspend mode and continue the programming operation. Further writes of the Program
Resume command are ignored. Another Program Suspend command can be written after the de-
vice has resumed programming.
The following is a C source code example of using the program suspend function. Refer to the
Spansion Low Level Driver User’s Guide (available on www.amd.com and www.fujitsu.com)
for general information on Spansion Flash memory software development guidelines.
/* Example: Program suspend command */
The following is a C source code example of using the program resume function. Refer to the
Spansion Low Level Driver User’s Guide (available on www.amd.com and www.fujitsu.com)
for general information on Spansion Flash memory software development guidelines.
/* Example: Program resume command */
Accelerated Program/Chip Erase
Accelerated single word programming, write buffer programming, sector erase, and chip erase
operations are enabled through the ACC function. This method is faster than the standard chip
program and erase command sequences.
The accelerated chip program and erase functions must not be used more than 10 times
per sector. In addition, accelerated chip program and erase should be performed at room tem-
perature (25
If the system asserts V
lock Bypass mode and uses the higher voltage on the input to reduce the time required for
program and erase operations. The system can then use the Write Buffer Load command se-
quence provided by the Unlock Bypass mode. Note that if a “Write-to-Buffer-Abort Reset” is
required while in Unlock Bypass mode, the full 3-cycle RESET command sequence must be used
to reset the device. Removing V
gram or erase operation, returns the device to normal operation.
*( (UINT16 *)base_addr + 0x000 ) = 0x00B0;
*( (UINT16 *)base_addr + 0x000 ) = 0x0030;
Sectors must be unlocked prior to raising ACC to V
The ACC pin must not be at V
celerated chip erase, or device damage may result.
Operation
Operation
°
Write
Write
C
Table 10.18 Software Functions and Sample Code
±
10
°
C).
HH
on this input, the device automatically enters the aforementioned Un-
A d v a n c e
S71WS-Nx0 Based MCPs
Bank Address
Bank Address
Byte Address
Byte Address
HH
HH
from the ACC input, upon completion of the embedded pro-
for operations other than accelerated programming and ac-
/* write suspend command
/* write resume command
I n f o r m a t i o n
Bank Address
Bank Address
Word Address
Word Address
HH
.
S71WS-N_01_A4 September 15, 2005
00B0h
0030h
Data
Data
*/
*/

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