h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 133

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

6.2.2
BARB is the channel B break address register. The bit configuration is the same as for BARA.
6.2.3
BCRA controls channel A PC breaks. BCRA also contains a condition match flag.
Bit
7
6
5
4
3
Bit Name
CMFA
CDA
BAMRA2
BAMRA1
BAMRA0
Break Address Register B (BARB)
Break Control Register A (BCRA)
Initial
Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Condition Match Flag A
CPU Cycle/DTC Cycle Select A
Break Address Mask Register A2 to A0
These bits specify which bits of the break address set in
BARA are to be masked.
000: BAA23 to BAA0 (All bits are unmasked)
001: BAA23 to BAA1 (Lowest bit is masked)
010: BAA23 to BAA2 (Lower 2 bits are masked)
011: BAA23 to BAA3 (Lower 3 bits are masked)
100: BAA23 to BAA4 (Lower 4 bits are masked)
101: BAA23 to BAA8 (Lower 8 bits are masked)
110: BAA23 to BAA12 (Lower 12 bits are masked)
111: BAA23 to BAA16 (Lower 16 bits are masked)
Description
[Setting condition]
When a condition set for channel A is satisfied
[Clearing condition]
When 0 is written to CMFA after reading CMFA = 1
Selects the channel A break condition bus master.
0: CPU
1: CPU or DTC
Rev. 2.00 Dec. 05, 2005 Page 95 of 724
Section 6 PC Break Controller (PBC)
REJ09B0200-0200