h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 520
h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
- Current page: 520 of 766
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Section 15 A/D Converter
15.4
The A/D converter operates by successive approximation with 10-bit resolution. It has two
operating modes; single mode and scan mode. When changing the operating mode or analog input
channel, clear the ADST bit in ADCSR to 0 first in order to prevent incorrect operation. The
ADST bit can be set at the same time as the operating mode or analog input channel is changed.
15.4.1
In single mode, A/D conversion is performed only once on the specified single channel as follows:
1. A/D conversion is started when the ADST bit is set to 1 by software or external trigger input.
2. When A/D conversion is completed, the result is transferred to the A/D data register
3. On completion of conversion, the ADF bit in ADCSR is set to 1. If the ADIE bit is set to 1 at
4. The ADST bit retains 1 during A/D conversion. When A/D conversion ends, the ADST bit is
15.4.2
In scan mode, A/D conversion is to be performed sequentially on the specified channels up to four
channels as follows.
1. When the ADST bit is set to 1 by software, TPU or external trigger input, A/D conversion
2. When the A/D conversion is completed on one channel, the result is sequentially transferred to
3. When the conversion is completed on all the selected channels, the ADF bit in ADCSR is set
4. Steps 2 to 3 are repeated as long as the ADST bit is set to 1. When the ADST bit is cleared to
Rev. 2.00 Dec. 05, 2005 Page 482 of 724
REJ09B0200-0200
corresponding to the channel.
this time, an ADI interrupt request is generated.
automatically cleared to 0 and the A/D converter enters the wait state. If the ADST bit is
cleared to 0 during A/D conversion, the conversion is stopped and the A/D converter enters the
wait state.
starts on the first channel in the group (for example, AN0 when CH3 and CH2 = 00, AN4
when CH3 and CH2 = 01, AN8 when CH3 and CH2 = 10, or AN12 when CH3 and CH2 = 11).
the A/D data register corresponding to the channel.
to 1. If the ADIE bit is set to 1 at this time, an ADI interrupt is requested after A/D conversion
ends. Then, the A/D converter restarts the conversion from the first channel in the group.
0, the A/D conversion stops and the A/D converter enters the wait state.
Operation
Single Mode
Scan Mode
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