h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 377

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
12.2
The WDT has the following registers. To prevent accidental overwriting, TCSR, TCNT, and
RSTCSR have to be written to by a different method to normal registers. For details, see section
12.5.1, Notes on Register Access.
• Timer counter_0 (TCNT_0)
• Timer control/status register_0 (TCSR_0)
• Timer counter_1 (TCNT_1)
• Timer control/status register_1 (TCSR_1)
• Reset control/status register (RSTCSR)
12.2.1
TCNT is an 8-bit readable/writable up-counter. TCNT is initialized to H'00 by a reset, when the
TME bit in TCSR is cleared to 0.
12.2.2
TCSR selects the clock source to be input to TCNT and the timer mode.
• TCSR_0
Bit
7
Bit Name
OVF
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
0
Initial
Value
R/W
R/(W)* Overflow Flag
Description
Indicates that TCNT has overflowed. Only a write of 0 is
permitted, to clear the flag.
[Setting conditions]
[Clearing condition]
When TCNT overflows (changes from H'FF to H'00)
When internal reset request generation is selected
in watchdog timer mode, OVF is cleared
automatically by the internal reset.
Cleared by reading TCSR when OVF = 1, then
writing 0 to OVF
Rev. 2.00 Dec. 05, 2005 Page 339 of 724
Section 12 Watchdog Timer (WDT)
REJ09B0200-0200

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