h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 30

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 14 Controller Area Network (HCAN)
Figure 14.1 HCAN Block Diagram ............................................................................................ 422
Figure 14.2 Message Control Register Configuration ................................................................ 447
Figure 14.3 Standard Format ...................................................................................................... 447
Figure 14.4 Extended Format ..................................................................................................... 447
Figure 14.5 Message Data Configuration ................................................................................... 449
Figure 14.6 Hardware Reset Flowchart ...................................................................................... 452
Figure 14.7 Software Reset Flowchart ....................................................................................... 453
Figure 14.8 Detailed Description of One-Bit Time .................................................................... 454
Figure 14.9 Transmission Flowchart .......................................................................................... 457
Figure 14.10 Transmit Message Cancellation Flowchart ........................................................... 460
Figure 14.11 Reception Flowchart ............................................................................................. 461
Figure 14.12 Unread Message Overwrite Flowchart.................................................................. 464
Figure 14.13 HCAN Sleep Mode Flowchart .............................................................................. 465
Figure 14.14 HCAN Halt Mode Flowchart ................................................................................ 467
Figure 14.15 DTC Transfer Flowchart ....................................................................................... 469
Figure 14.16 High-Speed Interface Using PCA82C250............................................................. 470
Section 15 A/D Converter
Figure 15.1 Block Diagram of A/D Converter ........................................................................... 476
Figure 15.2 A/D Conversion Timing.......................................................................................... 483
Figure 15.3 External Trigger Input Timing ................................................................................ 485
Figure 15.4 A/D Conversion Accuracy Definitions ................................................................... 487
Figure 15.5 A/D Conversion Accuracy Definitions ................................................................... 487
Figure 15.6 Example of Analog Input Circuit ............................................................................ 489
Figure 15.7 Example of Analog Input Protection Circuit........................................................... 490
Figure 15.8 Analog Input Pin Equivalent Circuit ....................................................................... 491
Section 16 Motor Control PWM Timer (PWM)
Figure 16.1 Block Diagram of PWM.......................................................................................... 494
Figure 16.2 Cycle Register Compare Match............................................................................... 500
Figure 16.3 Duty Register Compare Match (OPS = 0 in PWPR)............................................... 501
Figure 16.4 Differences in PWM Output According to Duty Register Set Value
(OPS = 0 in PWPR)................................................................................................. 502
Figure 16.5 16-Bit Register Access Operation (Bus Master ↔ PWCYR (16 Bits)) .................. 505
Figure 16.6 8-Bit Register Access Operation (Bus Master ↔ PWCR (Upper Eight Bits))........ 505
Figure 16.7 PWM Operation ...................................................................................................... 506
Figure 16.8 Disabling Buffer Transfer ....................................................................................... 507
Figure 16.9 Conflict between Buffer Register Write and Compare Match ................................ 508
Rev. 2.00 Dec. 05, 2005 Page xxx of xxxviii