h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 276

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 16-Bit Timer Pulse Unit (TPU)
Table 10.3 CCLR0 to CCLR2 (Channels 0 and 3)
Notes: 1. Synchronous operation is set by setting the SYNC bit in TSYR to 1.
Table 10.4 CCLR0 to CCLR2 (Channels 1, 2, 4, and 5)
Notes: 1. Synchronous operation is selected by setting the SYNC bit in TSYR to 1.
Rev. 2.00 Dec. 05, 2005 Page 238 of 724
REJ09B0200-0200
Channel
0, 3
Channel
1, 2, 4, 5 0
2. When TGRC or TGRD is used as a buffer register, TCNT is not cleared because the
2. Bit 7 is reserved in channels 1, 2, 4, and 5. It is always read as 0 and cannot be
Bit 7
CCLR2
0
1
Bit 7
Reserved*
buffer register setting has priority, and compare match/input capture does not occur.
modified.
2
Bit 6
CCLR1
0
1
0
1
Bit 6
CCLR1
0
1
Bit 5
CCLR0
0
1
0
1
0
1
0
1
Bit 5
CCLR0
0
1
0
1
Description
TCNT clearing disabled
TCNT cleared by TGRA compare match/input
capture
TCNT cleared by TGRB compare match/input
capture
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
TCNT clearing disabled
TCNT cleared by TGRC compare match/input
capture*
TCNT cleared by TGRD compare match/input
capture*
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
Description
TCNT clearing disabled
TCNT cleared by TGRA compare match/input
capture
TCNT cleared by TGRB compare match/input
capture
TCNT cleared by counter clearing for another
channel performing synchronous clearing/
synchronous operation*
2
2
1
1
1