h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 544

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 Motor Control PWM Timer (PWM)
16.5
16.5.1
PWM waveforms are output from pins PWM1A to PWM1H and PWM2A to PWM2H as shown
in figure 16.7.
Initial Settings: Set the PWM output polarity in PWPR; set the OEn bit in PWOCR to 1 to enable
PWM output from the corresponding pin; select the clock to be input to PWCNT with the CKS2 to
CKS0 bits in PWCR; set the PWM conversion cycle in PWCYR; and set the first frame of data in
PWBFRA, PWBFRC, PWBFRE, and PWBFRG.
Activation: Setting the CST bit in PWCR to 1 starts counting by PWCNT. When a compare
match between PWCNT and PWCYR occurs, data is transferred from the buffer register to the
duty register and the CMF bit in PWCR is set to 1. If the IE bit in PWCR has been set to 1 at this
time, an interrupt can be requested or the DTC can be activated.
Waveform Output: The PWM outputs selected by the OTS bits in PWDTRA, PWDTRC,
PWDTRE, and PWDTRG go high when a compare match occurs between PWCNT and PWCYR.
The PWM outputs not selected by the OTS bit are low. When a compare match occurs between
PWCNT and PWDTRA, PWDTRC, PWDTRE, or PWDTRG, the corresponding PWM output
goes low. If the corresponding bit in PWPR is set to 1, the output is inverted.
Next Frame: When a compare match occurs between PWCNT and PWCYR, data is transferred
from the buffer register to the duty register. PWCNT is reset and starts counting up from H'000.
The CMF bit in PWCR is set, and if the IE bit in PWCR1 or PWCR2 has been set, an interrupt can
be requested or the DTC can be activated.
Rev. 2.00 Dec. 05, 2005 Page 506 of 724
REJ09B0200-0200
PWDTRA
PWBFRA
PWCYR
PWMA
PWMB
Operation
PWM Operation
OTS (PWDTRA) = 0
Figure 16.7 PWM Operation
OTS (PWDTRA) = 1
OTS (PWDTRA) = 0
OTS (PWDTRA) = 1