h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 17

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 11 Programmable Pulse Generator (PPG) ............................................315
11.1 Features.............................................................................................................................. 315
11.2 Input/Output Pins ............................................................................................................... 317
11.3 Register Descriptions ......................................................................................................... 317
11.4 Operation ........................................................................................................................... 325
11.5 Usage Notes ....................................................................................................................... 336
Section 12 Watchdog Timer (WDT)..................................................................337
12.1 Features.............................................................................................................................. 337
12.2 Register Descriptions ......................................................................................................... 339
12.3 Operation ........................................................................................................................... 344
12.4 Interrupt Sources................................................................................................................ 346
12.5 Usage Notes ....................................................................................................................... 347
11.3.1 Next Data Enable Registers H, L (NDERH, NDERL) ......................................... 318
11.3.2 Output Data Registers H, L (PODRH, PODRL)................................................... 319
11.3.3 Next Data Registers H, L (NDRH, NDRL) .......................................................... 320
11.3.4 PPG Output Control Register (PCR) .................................................................... 323
11.3.5 PPG Output Mode Register (PMR) ...................................................................... 324
11.4.1 Overview............................................................................................................... 325
11.4.2 Output Timing....................................................................................................... 326
11.4.3 Sample Setup Procedure for Normal Pulse Output............................................... 327
11.4.4 Example of Normal Pulse Output (Example of Five-Phase Pulse Output)........... 328
11.4.5 Non-Overlapping Pulse Output............................................................................. 329
11.4.6 Sample Setup Procedure for Non-Overlapping Pulse Output ............................... 331
11.4.7 Example of Non-Overlapping Pulse Output
11.4.8 Inverted Pulse Output ........................................................................................... 334
11.4.9 Pulse Output Triggered by Input Capture ............................................................. 335
11.5.1 Module Stop Mode Setting ................................................................................... 336
11.5.2 Operation of Pulse Output Pins............................................................................. 336
12.2.1 Timer Counter (TCNT)......................................................................................... 339
12.2.2 Timer Control/Status Register (TCSR)................................................................. 339
12.2.3 Reset Control/Status Register (RSTCSR)............................................................. 343
12.3.1 Watchdog Timer Mode ......................................................................................... 344
12.3.2 Interval Timer Mode............................................................................................. 346
12.5.1 Notes on Register Access...................................................................................... 347
12.5.2 Contention between Timer Counter (TCNT) Write and Increment ...................... 348
12.5.3 Changing Value of CKS2 to CKS0....................................................................... 348
12.5.4 Switching between Watchdog Timer Mode and Interval Timer Mode................. 348
(Example of Four-Phase Complementary Non-Overlapping Output)................... 332
Rev. 2.00 Dec. 05, 2005 Page xvii of xxxviii