h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 413

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
13.4.2
In asynchronous mode, the SCI operates on a basic clock with a frequency of 16 times the transfer
rate. In reception, the SCI samples the falling edge of the start bit using the basic clock, and
performs internal synchronization. Receive data is latched internally at the rising edge of the 8th
pulse of the basic clock as shown in figure 13.3. Thus, the reception margin in asynchronous mode
is given by formula (1) below.
M = { (0.5 –
Where N: Ratio of bit rate to clock (N = 16)
Assuming values of F (absolute value of clock rate deviation) = 0 and D (clock duty cycle) = 0.5
in formula (1), the reception margin can be given by the formula.
M = {0.5 – 1/(2 × 16)} × 100 [%] = 46.875%
However, this is only the computed value, and a margin of 20% to 30% should be allowed for in
system design.
Internal basic
clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
D: Clock duty cycle (D = 0.5 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute value of clock rate deviation
Receive Data Sampling Timing and Reception Margin in Asynchronous Mode
Figure 13.3 Receive Data Sampling Timing in Asynchronous Mode
2N
1
) –
0
D – 0.5
N
8 clocks
Start bit
– (L – 0.5) F}
16 clocks
7
100 [%]
15 0
Section 13 Serial Communication Interface (SCI)
Rev. 2.00 Dec. 05, 2005 Page 375 of 724
D0
... Formula (1)
7
REJ09B0200-0200
15 0
D1

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