h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 178

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 8 Data Transfer Controller (DTC)
8.2.1
MRA is an 8-bit register that selects the DTC operating mode.
Rev. 2.00 Dec. 05, 2005 Page 140 of 724
REJ09B0200-0200
Bit
7
6
5
4
3
2
1
Bit Name
SM1
SM0
DM1
DM0
MD1
MD0
DTS
DTC Mode Register A (MRA)
Initial
Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
R/W







Description
Source Address Mode 1 and 0
These bits specify an SAR operation after a data
transfer.
0X: SAR is fixed
10: SAR is incremented after a transfer
(by +1 when Sz = 0; by +2 when Sz = 1)
11: SAR is decremented after a transfer
(by –1 when Sz = 0; by –2 when Sz = 1)
Destination Address Mode 1 and 0
These bits specify a DAR operation after a data
transfer.
0X: DAR is fixed
10: DAR is incremented after a transfer
(by +1 when Sz = 0; by +2 when Sz = 1)
11: DAR is decremented after a transfer
(by –1 when Sz = 0; by –2 when Sz = 1)
DTC Mode
These bits specify the DTC transfer mode.
00: Normal mode
01: Repeat mode
10: Block transfer mode
11: Setting prohibited
DTC Transfer Mode Select
Specifies whether the source side or the destination
side is set to be a repeat area or block area, in repeat
mode or block transfer mode.
0: Destination side is repeat area or block area
1: Source side is repeat area or block area