CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 108

• Manufacturer Part Number: CYNSE10128-083FGCI
• Manufacturer: CYPRESS [Cypress Semiconductor]

The timing diagrams below corresponds to the Hit/Miss assumptions defined in Table 6-12.
Table 6-12. Hit/Miss Assumptions in MultiSearchMode
Document #: 38-02069 Rev. *F
• The device receiving all the LHO signals from the other devices is considered the last device.
• All the shared signals in the following timing diagrams showing tri-stated condition (“z”) indicate that, that particular device is
• Comparing the hardware diagrams shown in Figure 6-9 and Figure 6-14, enabling MultiSearch does not mean that a board
• One way to create many tables of different widths in a bank of NSEs is by having table designation bits. It is assumed that bits
Search Number
not driving the shared signals. The shared signals are not three-stated in a real life because other devices will be driving them.
layout change is required. The LHO_1_L and LHI_1_L share the same pin with the Full In and Full Out signals, which are not
shown in Figure 6-9. Cascading multiple devices together still allow the user to configure the devices through software to
perform single-search or MultiSearch operations without any board change.
[71:70] for each entry will be the table designation bits. The DQ[71:70] will be 00 in each of the two A and B cycles of the ×72-
bit MultiSearch (M-Search1). DQ[71:70] is 01 in each of the A and B cycles of the ×144-bit MultiSearch (M-Search2). DQ[71:70]
is 10 in each of the A, B, C, and D cycles of the ×288-bit MultiSearch (M-Search3).
Device 3 to 6
Device 0
Device 1
Device 2
Device 7
Miss
Miss
Miss
Miss
Miss
#1 (x72)
Miss
Miss
Miss
Hit
Hit
CONFIDENTIAL
PRELIMINARY
Miss
Miss
Miss
Miss
Miss
#2 (x144)
Miss
Miss
Miss
Miss
Hit
Miss
Miss
Miss
Miss
Hit
#3 (x288)
CYNSE10512
CYNSE10256
CYNSE10128
Page 108 of 153
Miss
Miss
Miss
Miss
Miss
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