CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 51
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CYNSE10128-083FGCI
Manufacturer Part Number
CYNSE10128-083FGCI
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CYNSE10128-083FGCI.pdf
(153 pages)
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6.2.2
6.2.3
6.3
In both the Non-Enhanced and Enhanced mode, the Read command can be issued to read data from the data array, mask array,
NSE-associated SRAMs or internal registers. The Read can be a single or burst Read (Table 6-2). Burst Read can only be issued
for accesses to the data or mask array locations. SRAM Read operation is covered in Section 6.7.1 to Section 6.7.3. In the
Enhanced mode, the Read command is also used to issue the Read Parity command, which is issued to perform parity check
on the data and mask array entries.
Read is a blocking operation and must be completed before the next operation can be issued.
Table 6-2. Single/Burst Read Command Parameters
Document #: 38-02069 Rev. *F
SEARCH
SEARCH
CMD Parameter
LEARN
LEARN
WRITE
WRITE
READ
READ
Cm d
Cm d
CMD[2]
Enhanced Mode (EMODE = 1) with MultiSearch Disabled (MSE = 0)
Enhanced Mode (EMODE = 1) with MultiSearch Enabled (MSE = 1)
Read Command
0
1
Cycle
Cycle
A
A
A
A
B
B
B
B
A
A
A
A
B
B
B
B
1=Mask
1=Mask
GMR[3]
GMR[3]
GMR[3]
GMR[3]
0=Data
0=Data
10
10
X
X
X
X
0
0
Read Command
Single Read
Burst Read
X=x288/x576
X=x288/x576
1=Parallel
1=Parallel
0=Normal
0=Normal
0=CMPR
0=CMPR
1=x144
1=x144
0=x72
0=x72
1=DQ
1=DQ
9
X
X
0
X
X
9
0
0=Single-Search
Reads a single location of the data array, mask array, NSE-associated SRAM or internal
registers. All access information is applied on the DQ bus.
Reads a block of locations from the data or mask array as a burst. RBURREG specifies
the starting address and the length of the data transfer from the data or mask array; it
also auto-increments the address for each access. All other access information is
applied on the DQ bus.
1=Multi-Search
8
0
0
0
0
8
0
CONFIDENTIAL
PRELIMINARY
00: x72; 01: x144; 1X:x288/x576
00: x72; 01: x144; 1X:x288/x576
EADR[2:0]
EADR[2:0]
EADR[2:0]
EADR[2:0]
SSR[2:0]
SSR[2:0]
0X:x288/x576 (last cycle)
0X:x288/x576 (last cycle)
(all except last cycle);
(all except last cycle);
0
0
0
0
7
7
EADR[1:0]
EADR[1:0]
EADR[1:0]
EADR[1:0]
[14]
[14]
[14]
[14]
[14]
[14]
[14]
[14]
Description
6
6
GMR[2:0]
GMR[2:0]
5
GMR[2:0]
GMR[2:0]
5 4
4
0
0
3
3
0=x288/x576 (last cycle)
0=x288/x576 (last cycle)
1=x288/x576 (all except
1=x288/x576 (all except
CMPR[3:0]
CMPR[3:0]
CMPR[3:0]
CMPR[3:0]
0=x72 or x144
0=x72 or x144
last cycles)
last cycle)
CYNSE10512
CYNSE10256
CYNSE10128
0 = Single
0 = Single
0 = Single
0 = Single
1 = Burst
1 = Burst
1 = Burst
1 = Burst
2
2
Page 51 of 153
1 0
0 0
0 1
1 0
1 1
1 0
0
0
1 0
1
0
1
1
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