CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 50

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CYNSE10128-083FGCI

Manufacturer Part Number
CYNSE10128-083FGCI
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
6.0
A master device, such as an ASIC controller, issues commands to the Ayama 10000 device using the CMD bus and CMDV
signals. The following subsections describe the operation of these commands.
6.1
The Ayama 10000 device implements four basic commands, as shown in Table 6-1. The Search command is a non-blocking
operation which allows another operation to be issued immediately on the following cycle. Read, Write and Learn are blocking
operations. There are also other derivative commands that the device supports. The operation of basic commands as well as the
derivative commands are explained in more detail in the following sections.
The command code must be presented to CMD[1:0] while keeping the CMDV signal HIGH for two CLK2X cycles (cycles A and
B) when the CLK_MODE pin is LOW. In CLK2X mode, the controller ASIC must align the instructions using the PHS_L signal.
The command code must be presented to CMD[1:0] while keeping the CMDV signal HIGH for one CLK1X cycle when the
CLK_MODE pin is HIGH. In CLK1X mode, cycle A ends on the falling edge of CLK1X and cycle B ends on the rising edge of
CLK1X. Valid data must be present at the edge ending any given cycle for valid inputs. The CMD[10:2] field passes command
parameters in cycles A and B. All commands must begin with cycle A operations.
Table 6-1. Command Codes
6.2
Table 6.2.1, Table 6.2.2 and Table 6.2.3 list the command bus fields that contain the Ayama 10000 command parameters and
their respective cycles.
6.2.1
Note:
Document #: 38-02069 Rev. *F
14. The NSE density determines to which SADR field EADR[2:0] is mapped. In Ayama10128, SADR[23:21] gets EADR[2:0]; In Ayama10256, SADR[24:22] gets
SEARCH
Command Code
LEARN
WRITE
READ
Cm d
EADR[2:0]; In Ayama10512, SADR[25:23] gets EADR[2:0].
(binary)
Command Encoding
Command Bus Parameters
Non-Enhanced Mode (EMODE = 0)
00
01
10
11
Operations and Timing Diagrams
Cycle
A
A
A
A
B
B
B
B
GMR[3]
GMR[3]
10
X
X
X
Command
Search
Learn
Read
Write
0=Normal
1=Parallel
X=x288
1=x144
0=x72
X
X
X
9
Reads from one of the following: data array, mask array, device registers, or external SRAM.
Read command is also used to issue Read Parity command.
Writes to one of the following: data array, mask array, device registers, or external SRAM.
Searches the data array for a desired pattern using the specified register from the GMR
array and local mask associated with each data cell.
The device has internal storage for up to sixteen comparands that it can learn. The device
controller can insert these entries at the next-free address (as specified by the NFA register)
using the Learn instruction.
8
CONFIDENTIAL
PRELIMINARY
0
EADR[2:0]
EADR[2:0]
EADR[2:0]
EADR[2:0]
SSR[2:0]
0
0
7
[14]
[14]
[14]
[14]
Description
1=x144
0=x72
6
GMR[2:0]
GMR[2:0]
5 4 3
0
CMPR[3:0]
CMPR[3:0]
1=x288 (first cycle)
0=x288 (last cycle)
0=x72 or x144
0 = Single
0 = Single
CYNSE10512
CYNSE10256
CYNSE10128
1 = Burst
1 = Burst
2
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1 0
0
0
1 0
1 1
0
1
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