CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 3

• Manufacturer Part Number: CYNSE10128-083FGCI
• Manufacturer: CYPRESS [Cypress Semiconductor]

6.0 OPERATIONS AND TIMING DIAGRAMS ..................................................................................... 50
7.0 JTAG (IEEE 1149.1) ..................................................................................................................... 135
8.0 POWER CONSUMPTION ............................................................................................................ 136
9.0 ELECTRICAL SPECIFICATIONS ................................................................................................ 137
Document #: 38-02069 Rev. *F
5.10 Depth Cascading .................................................................................................................... 45
5.11 Device Selection in a Cascaded System ................................................................................ 48
5.12 Power-up Sequence ............................................................................................................... 49
6.1 Command Encoding ................................................................................................................. 50
6.2 Command Bus Parameters ....................................................................................................... 50
6.3 Read Command ........................................................................................................................ 51
6.4 Write Command ........................................................................................................................ 53
6.5 Search Command ..................................................................................................................... 56
6.6 Learn Command ..................................................................................................................... 113
6.7 SRAM PIO Access .................................................................................................................. 121
6.8 Timing Sequences for Back-to-Back Operations .................................................................... 133
6.9 Full Signal Timing Diagram ..................................................................................................... 134
5.10.1 Depth Cascading up to Eight Devices in One Block ..................................................................... 45
5.10.2 Depth Cascading up to 31 Devices in 4 Blocks ............................................................................ 47
5.10.3 Depth Cascading for a FULL Signal .............................................................................................. 47
6.2.1 Non-Enhanced Mode (EMODE = 0) ............................................................................................... 50
6.2.2 Enhanced Mode (EMODE = 1) with MultiSearch Disabled (MSE = 0) ............................................ 51
6.2.3 Enhanced Mode (EMODE = 1) with MultiSearch Enabled (MSE = 1) ............................................ 51
6.3.1 Single Read ..................................................................................................................................... 52
6.3.2 Burst Read ...................................................................................................................................... 52
6.3.3 Read Parity ..................................................................................................................................... 53
6.4.1 Single Write ..................................................................................................................................... 54
6.4.2 Burst Write ...................................................................................................................................... 54
6.4.3 Parallel Write ................................................................................................................................... 55
6.5.1 Mixed-size Single Searches with One Device on Tables Configured with Different Widths ........... 56
6.5.2 Mixed-size Multi Searches with One Device on Tables Configured with Different Widths .............. 58
6.5.3 72-bit Single Search for 1 device or cascade up to eight devices ................................................... 60
6.5.4 72-bit MultiSearch for One Device or Cascade Up to Eight Devices .............................................. 65
6.5.5 144-bit Single Search for Cascade Up to 31 Devices ..................................................................... 72
6.5.6 576-bit Single Search for One Device or Cascade up to Eight Devices ......................................... 85
6.5.7 576-bit MultiSearch for One Device or Cascade up to Eight Devices ............................................. 89
6.5.8 Mixed-size Single Searches with 31 Devices on Tables Configured with Different Widths ............ 95
6.5.9 Mixed-size Multi Searches with 8 Devices on Tables Configured with Different Widths ............... 107
6.6.1 Non-Enhanced Mode .................................................................................................................... 113
6.6.2 Enhanced Mode ............................................................................................................................ 114
6.6.3 Learn Operation on Depth-Cascaded Table ................................................................................. 117
6.7.1 SRAM Read with a Table of One Device ...................................................................................... 121
6.7.2 SRAM Read with a Table of up to Eight Devices .......................................................................... 122
6.7.3 SRAM Read with a Table of up to 31 Devices .............................................................................. 125
6.7.4 SRAM Write with a Table of One Device ...................................................................................... 127
6.7.5 SRAM Write with a Table of up to Eight Devices .......................................................................... 129
6.7.6 SRAM Write with Table(s) Consisting of up to 31 Devices ........................................................... 131
TABLE OF CONTENTS
CONFIDENTIAL
PRELIMINARY
(continued)
CYNSE10512
CYNSE10256
CYNSE10128
Page 3 of 153
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