CYNSE10128-083FGCI CYPRESS [Cypress Semiconductor], CYNSE10128-083FGCI Datasheet - Page 138

• Manufacturer Part Number: CYNSE10128-083FGCI
• Manufacturer: CYPRESS [Cypress Semiconductor]

10.0
10.1
Table 10-1. AC Timing Parameters with CLK2X
Document #: 38-02069 Rev. *F
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
26. Values are based on 50% signal levels.
27. Values are based on 50% signal levels and a 50%/50% duty cycle of CLK1X/CLK2X.
28. Based on an AC load of 6 pF.
29. Cascade signals only transition on CLK2X Cycle A rising edge
30. Based on an AC load of 30 pF. This parameter is guaranteed by design and is not production tested.
CLOCK
LOCK
CKHI
CKLO
ISCH
IHCH
ICSCH
ICSCH_HIT
ICSCH_FUL
ICHCH
ICHCH_HIT
ICHCH_FUL
CKHOV
CKHOV_HIT
CKHOV_FUL
CKCOH
CKCOH_HIT
CKCOH_FUL
CKHOVFE
CKHOV_FNE
CKCOHFE
CKCOH_FNE
CKHDV
CKHDZ
CKHSV
CKHSHZ
CKHSLZ
OH
RSTL
Parameter
AC Timing Parameters and Waveforms with CLK2X
AC Timing Parameters, Waveforms and Test Conditions
CLK2X frequency
PLL lock time
CLK2X HIGH pulse
CLK2X LOW pulse
Input set-up time to CLK2X rising edge
Input hold time to CLK2X rising edge
Cascaded input set-up time to CLK2X rising
edge
LHI, BHI signals
FULI signals
Cascaded input hold time to CLK2X rising
edge
LHI, BHI signals
FULI signals
Rising edge of CLK2X to cascade output valid
28]
LHO, BHO signals
FULO signals
Rising edge of CLK2X to cascade output invalid
(output hold)
LHO, BHO signals
FULO signals
Rising edge of CLK2X to FULL signal valid
(Enhanced mode)
Rising edge of CLK2X to FULL signal valid (Non-
Enhanced mode)
Rising edge of CLK2X to FULL invalid (Enhanced
mode)
Rising edge of CLK2X to FULL invalid (Non-
Enhanced mode)
Rising edge of CLK2X to DQ valid
Rising edge of CLK2X to DQ High-Z
Rising edge of CLK2X to SRAM bus valid
Rising edge of CLK2X to SRAM bus High-Z
Rising edge of CLK2X to SRAM bus Low-Z
Rising edge of CLK2X to DQ or SRAM bus invalid
(output hold)
Minimum LOW pulse width for RST_L
[24, 27]
[24, 27]
[30]
[30]
[30]
Description
[23]
[23]
CONFIDENTIAL
[26]
PRELIMINARY
[26, 30]
[23]
[23]
[26]
[26, 30]
[26, 30]
[27,
Ayama 10000-
Min.
0.75
0.75
100
100
2.4
2.4
1.8
0.6
4.5
1.8
0.8
1.2
1.2
0.5
0.5
2.2
0.5
0
083
Max.
166
0.5
3.9
3.2
3.5
1.8
3.5
1.8
7
7
Ayama 10000-
Min.
0.75
0.75
100
100
2.0
2.0
1.5
0.5
1.5
0.7
1.2
1.2
0.5
0.5
1.9
0.5
4
0
100
Max.
200
0.5
3.4
6.5
6.5
3.0
1.8
3.0
1.8
3
Ayama 10000-
Min.
0.75
0.75
0.75
100
100
1.5
1.5
1.0
0.3
3.5
0.5
0.5
0.5
1.9
CYNSE10512
CYNSE10256
CYNSE10128
1
0
1
1
133
Page 138 of 153
Max.
266
0.5
2.5
2.5
2.5
1.8
2.5
1.8
6
6
MHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
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