MT41J128M8 MDTIC [Micon Design Technology Corporation], MT41J128M8 Datasheet
MT41J128M8
Manufacturer Part Number
MT41J128M8
Description
1Gb: x4, x8, x16 DDR3 SDRAM
Manufacturer
MDTIC [Micon Design Technology Corporation]
Datasheet
1.MT41J128M8.pdf
(181 pages)
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Table 1:
DDR3 SDRAM
MT41J256M4 – 32 Meg x 4 x 8 Banks
MT41J128M8 – 16 Meg x 8 x 8 Banks
MT41J64M16 – 8 Meg x 16 x 8 Banks
Features
• V
• 1.5V center-terminated push/pull I/O
• Differential bidirectional data strobe
• 8n-bit prefetch architecture
• Differential clock inputs (CK, CK#)
• 8 internal banks
• Nominal and dynamic on-die termination (ODT) for
• CAS (READ) latency (CL): 5, 6, 7, 8, 9, 10, or 11
• POSTED CAS ADDITIVE latency (AL): 0, CL - 1, CL - 2
• CAS (WRITE) latency (CWL): 5, 6, 7, 8, based on
• Fixed burst length (BL) of 8 and burst chop (BC) of 4
• Selectable BC4 or BL8 on-the-fly (OTF)
• Self refresh mode
• T
• Clock frequency range of 300–800 MHz
• Self refresh temperature (SRT)
• Automatic self refresh (ASR)
• Write leveling
• Multipurpose register
• Output driver calibration
PDF: 09005aef826aa906/Source: 09005aef82a357c3
1Gb_DDR3_D1 .fm - Rev. D 8/1/08 EN
data, strobe, and mask signals
(via the mode register set [MRS])
– 64ms, 8,192 cycle refresh at 0
– 32ms at 85
C
DD
Speed Grade
of 0
= V
-125E
-187E
-125F
-125
-15E
-15F
-187
-25E
o
-15
-25
C to 95
DD
Q = +1.5V ±0.075V
Key Timing Parameters
Products and specifications discussed herein are subject to change by Micron without notice.
o
C to 95
o
C
o
C
Data Rate (MT/s)
1600
1600
1600
1333
1333
1333
1066
1066
800
800
o
C to 85
o
C
Target
t
CK
11-11-11
10-10-10
10-10-10
t
9-9-9
9-9-9
8-8-8
8-8-8
7-7-7
6-6-6
5-5-5
RCD-
1
Options
• Configuration
• FBGA package (Pb-free) - x4, x8
• FBGA package (Pb-free) - x16
• Timing - cycle time
• Revision
t
RP-CL
– 256 Meg x 4
– 128 Meg x 8
– 64 Meg x 16
– 78-ball FBGA (8mm x 11.5mm) Rev. F
– 78-ball FBGA (9mm x 11.5mm) Rev. D
– 86-ball FBGA (9mm x 15.5mm) Rev. B
– 96-ball FBGA (9mm x 15.5mm) Rev. B
– 1.25ns @ CL = 11 (DDR3-1600)
– 1.25ns @ CL = 10 (DDR3-1600)
– 1.25ns @ CL = 9 (DDR3-1600)
– 1.5ns @ CL = 10 (DDR3-1333)
– 1.5ns @ CL = 9 (DDR3-1333)
– 1.5ns @ CL = 8 (DDR3-1333)
– 1.87ns @ CL = 8 (DDR3-1066)
– 1.87ns @ CL = 7 (DDR3-1066)
– 2.5ns @ CL = 6 (DDR3-800)
– 2.5ns @ CL = 5 (DDR3-800)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RCD (ns)
13.75
11.25
12.5
13.5
13.1
12.5
1Gb: x4, x8, x16 DDR3 SDRAM
15
12
15
15
t
RP (ns)
©2006 Micron Technology, Inc. All rights reserved.
13.75
11.25
12.5
13.5
13.1
12.5
15
12
15
15
Marking
Features
CL (ns)
:B/:D/:F
13.75
11.25
256M4
128M8
64M16
12.5
13.5
13.1
12.5
-125E
-125F
-187E
-125
-15F
-187
-25E
15
12
15
15
-15E
HX
-15
-25
BY
LA
JP
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