MT41J128M8 MDTIC [Micon Design Technology Corporation], MT41J128M8 Datasheet - Page 71
MT41J128M8
Manufacturer Part Number
MT41J128M8
Description
1Gb: x4, x8, x16 DDR3 SDRAM
Manufacturer
MDTIC [Micon Design Technology Corporation]
Datasheet
1.MT41J128M8.pdf
(181 pages)
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Table 53:
Parameter
ZQCL command: Long
calibration time
ZQCS command: Short calibration time
Exit reset from CKE HIGH to a valid command
Begin power supply ramp to power supplies
stable
RESET# LOW to power supplies stable
RESET# LOW to I/O and R
REFRESH-to-ACTIVATE or REFRESH command
period
Maximum refresh
period
Maximum average
periodic refresh
Exit self refresh to commands not requiring a
locked DLL
Exit self refresh to commands requiring a
locked DLL
Minimum CKE low pulse width for self refresh
entry to self refresh exit timing
Valid clocks after self refresh entry or power-
down entry
Valid clocks before self refresh exit, power-
down exit, or reset exit
Electrical Characteristics and AC Operating Conditions (Sheet 5 of 7)
Notes: 1–8 apply to the entire table; notes appear on page 74
POWER-UP and RESET
operation
Normal operation
T
T
T
T
TT
C
C
C
C
= 0°C to 85°C
= >85°C to 95°C
= 0°C to 85°C
= >85°C to 95°C
High-Z
Symbol
t
t
t
t
t
t
ZQ
t
CKSRX
ZQ
t
XSDLL
CKESR
CKSRE
V
t
t
t
t
ZQ
t
REFI
XPR
t
RPS
RFC
IOz
DDPR
XS
–
OPER
INIT
CS
Initialization and Reset Timing
Min
512
256
64
MIN = 110; MAX = 9 ×
DDR3-800
Self Refresh Timing
Calibration Timing
Refresh Timing
Max
–
–
–
MIN = greater of 5CK or
MIN = greater of 5CK or
MIN = greater of 5CK or 10ns; MAX = n/a
MIN = greater of 5CK or 10ns; MAX = n/a
MIN =
Min
512
256
DDR3-1066
64
MIN =
t
MIN = n/a; MAX = 200
REFI (REFRESH-to-REFRESH command period)
t
MIN = n/a; MAX = 20
MIN = 0; MAX = 200
CKE (MIN) + CK; MAX = n/a
t
7.8 (64ms/8,192)
3.9 (32ms/8,192)
DLLK (MIN); MAX = n/a
Max
–
–
–
64 (1X)
32 (2X)
t
t
RFC + 10ns; MAX = n/a
RFC + 10ns; MAX = n/a
Min
512
256
DDR3-1333
64
Max
–
–
–
Min
512
256
DDR3-1600
64
Max
–
–
–
Units Notes
CK
ms
ms
CK
CK
CK
CK
CK
CK
CK
ms
ms
CK
ns
ns
µs
µs
36
37
37
37
37
29