MT41J128M8 MDTIC [Micon Design Technology Corporation], MT41J128M8 Datasheet - Page 175

• Manufacturer Part Number: MT41J128M8
• Description: 1Gb: x4, x8, x16 DDR3 SDRAM
• Manufacturer: MDTIC [Micon Design Technology Corporation]

Table 83:
Figure 120: Synchronous to Asynchronous Transition During Precharge Power-Down (DLL Off) Entry
Description
Power-down entry transition period (power-down entry)
Power-down exit transition period (power-down exit)
ODT to R
ODT to R
t
or synchronous
or synchronous
ANPD
asynchronous
asynchronous
asynchronous
asynchronous
DRAM R
DRAM R
synchronous
synchronous
DRAM R
Command
ODT A
ODT B
ODT C
CKE
TT
TT
CK#
TT
CK
A
B
C
TT
TT
turn-on delay (ODTL on = WL - 2)
turn-off delay (ODTL off = WL - 2)
NOP
T0
ODT Parameters for Power-Down (DLL Off) Entry and Exit Transition Period
Notes:
REF
T1
1. AL = 0; CWL = 5; ODTL off = WL - 2 = 3.
NOP
T2
R
TT
NOP
_
T3
NOM
R
TT
NOP
T4
_
NOM
ODTL off
t ANPD
NOP
T5
NOP
T6
t AOF (MIN)
t AOF (MAX)
Lesser of:
Lesser of:
NOP
T7
ODTL on
ODTL off
t RFC (MIN)
R
TT
_
NOM
PDE transition period
NOP
T8
t
t
AONPD (MIN) (1ns) or
AOFPD (MIN) (1ns) or
×
×
t
t
CK +
Min
CK +
Greater of:
WL - 1 (greater of ODTL off + 1 or ODTL on + 1)
NOP
T9
t
t
AON (MIN)
AOF (MIN)
ODTL off + t AOFPD (MIN)
t AOFPD (MIN)
t AOFPD (MAX)
ODTL off + t AOFPD (MAX)
T10
NOP
t
ANPD or
t
ANPD +
T11
NOP
t
RFC - refresh to CKE LOW
T12
NOP
t
XPDLL
Indicates A Break In
Time Scale
Greater of:
Greater of:
ODTL on
ODTL off
T13
NOP
Ta0
NOP
t
t
×
AONPD (MAX) (9ns) or
×
AOFPD (MAX) (9ns) or
t
t
CK +
CK +
Max
Transitioning
Ta1
NOP
t
t
AON (MAX)
AOF (MAX)
t AOFPD (MIN)
t AOFPD (MAX)
Ta2
NOP
Don’t Care
NOP
Ta3