AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 137
AMD-K6
Manufacturer Part Number
AMD-K6
Description
AMD-K6 Processor
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AMD-K6.pdf
(346 pages)
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20695H/0—March 1998
Table 18. Bus Cycle Definition
Table 19. Special Cycles
Chapter 5
Code Read, Instruction Cache Line Fill
Code Read, Noncacheable
Code Read, Noncacheable
Encoding for Special Cycle
Interrupt Acknowledge
I/O Read
I/O Write
Memory Read, Data Cache Line Fill
Memory Read, Noncacheable
Memory Read, Noncacheable
Memory Write, Data Cache Writeback
Memory Write, Noncacheable
Note:
Stop Grant
Flush Acknowledge
(FLUSH# sampled asserted)
Writeback
(WBINVD instruction)
Halt
Flush (INVD, WBINVD
instruction)
Shutdown
Note:
x means “don’t care”
x means “don’t care”
Special Cycle
Bus Cycle Initiated
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Signal Descriptions
1
0
1
1
1
1
M/IO#
1
1
1
0
0
0
0
1
1
1
1
1
1
1
0
1
1
1
0
1
1
0
1
1
Generated by Processor
D/C#
1
1
1
0
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
W/R#
0
0
0
1
0
0
1
0
0
0
1
1
AMD-K6
0
0
0
0
0
0
1
1
1
1
1
1
CACHE#
®
Processor Data Sheet
0
1
1
1
1
1
0
1
0
1
x
x
1
1
1
1
1
1
x
x
x
x
x
x
Generated
by System
KEN#
0
1
0
1
x
x
x
x
x
x
x
x
119
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