AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 239

• Manufacturer Part Number: AMD-K6
• Description: AMD-K6 Processor
• Manufacturer: AMD [Advanced Micro Devices]

20695H/0—March 1998
Debug Exceptions
Chapter 11
The LE (bit 8) and GE (bit 9) bits in DR7 have no effect on the
operation of the processor and are provided in order to be
software compatible with previous generations of x86
processors.
When set to 1, the GD bit in DR7 (bit 13) enables the debug
exception associated with the BD bit (bit 13) in DR6. This bit is
set to 0 when a debug exception is generated.
LEN3–LEN0 and RW3–RW0 are two-bit fields in DR7 that
specify the length and type of each breakpoint as defined in
Table 41.
Table 41. DR7 LEN and RW Definitions
A debug exception is categorized as either a debug trap or a
debug fault. A debug trap calls the debugger following the
execution of the instruction that caused the trap. A debug fault
calls the debugger prior to the execution of the instruction that
caused the fault. All debug traps and faults generate either an
Interrupt 01h or an Interrupt 03h exception.
Notes:
1. LEN bits equal to 10b is undefined.
2. When RW equals 00b, LEN must be equal to 00b.
3. When RW equals 10b, debugging extensions (DE) must be enabled (bit 3 of CR4 must be set
to 1). If DE is set to 0, then RW equal to 10b is undefined.
LEN Bits
00b
00b
01b
11b
00b
01b
11b
00b
01b
11b
1
Test and Debug
RW Bits
00b
10b
01b
11b
2
3
AMD-K6
Four-byte Data Read or Write
One-byte Data Read or Write
Two-byte Data Read or Write
Four-byte I/O Read or Write
One-byte I/O Read or Write
Two-byte I/O Read or Write
Four-byte Data Write
Instruction Execution
One-byte Data Write
Two-byte Data Write
®
Breakpoint
Processor Data Sheet
221