AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 36

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AMD-K6

Manufacturer Part Number
AMD-K6
Description
AMD-K6 Processor
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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AMD-K6
18
®
Processor Data Sheet
The multimedia unit shares pipeline control with the Integer X
unit and executes all MMX instructions.
The Integer Y execution unit can operate on the basic word and
doubleword ALU operations — ADD, AND, CMP, OR, SUB,
XOR, zero-extend and sign-extend operands.
The branch condition unit is separate from the branch
prediction logic in that it resolves conditional branches such as
JCC and LOOP after the branch condition has been evaluated.
Table 1.
Store
Load
Integer X
Multimedia
Integer Y
Branch
FPU
Execution Unit
Execution Latency and Throughput of Execution Units
Preliminary Information
Internal Architecture
LEA/PUSH, Address
Memory Store
Memory Loads
Integer ALU
Integer Multiply
Integer Shift
MMX ALU
MMX Shifts, Packs, Unpack
MMX Multiply
Basic ALU (16
Resolves Branch Conditions
FADD, FSUB, FMUL
Function
-
& 32-bit operands)
Latency Throughput
2–3
1–2
1
1
2
1
1
1
1
1
1
2
20695H/0—March 1998
2–3
1–2
1
1
1
1
1
2
1
1
1
1
Chapter 2

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